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MPC2002SG66 Datasheet

  • MPC2002SG66

  • 256KB and 512KB BurstRAM Secondary Cache Module for PowerPC ...

  • 238.45KB

  • 14頁

  • MOTOROLA   MOTOROLA

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MPC2002/D
256KB and 512KB BurstRAM鈩?/div>
Secondary Cache Module for
PowerPC鈩?鈥?Based Systems
The MPC2002SG and MPC2003SG are designed to provide a burstable, high
performance, 256K/512K L2 cache for the PowerPC 60x processors. The mod-
ules are configured as 32K x 72 and 64K x 72 bits in a 136 pin dual readout single
inline memory module (DIMM). The module uses four of Motorola鈥檚
MCM67M518 or MCM67M618 BiCMOS BurstRAMs.
Bursts can be initiated with either transfer start processor (TSP) or transfer
start controller (TSC). Subsequent burst addresses are generated internal to the
BurstRAM by the burst address advance (BAA) pin.
Write cycles are internally self timed and are initiated by the rising edge of the
clock (K) input. Eight write enables are provided for byte write control.
The cache family is designed to interface with the PowerPC 60x bus and re-
quires external tag.
PD0 鈥?PD2 are reserved for density and speed identification.
鈥?/div>
PowerPC鈥搒tyle Burst Counter on Board
鈥?/div>
Dual Readout SIMM for Circuit Density
鈥?/div>
Single 5 V
鹵
5% Power Supply
鈥?/div>
All Inputs and Outputs are TTL Compatible
鈥?/div>
Three State Outputs
鈥?/div>
Byte Parity
鈥?/div>
Byte Write Capability
鈥?/div>
Fast Module Clock Rates: 66 MHz, 60 MHz, 50MHz
鈥?/div>
Decoupling Capacitors for each Fast Static RAM
鈥?/div>
High Quality Multi鈥揕ayer FR4 PWB With Separate Power and Ground Planes
鈥?/div>
I/Os are 3.3 V Compatible
MPC2002
MPC2003
(Formerly MCM72MS32/64)
136鈥揕EAD DIMM
CASE 1104鈥?1
TOP VIEW
1
34
35
68
BurstRAM is a trademark of Motorola.
PowerPC and PowerPC 601 are trademarks of International Business Machines Corp.
5/95
漏
Motorola, Inc. 1995
MOTOROLA FAST SRAM
MPC2002鈥PC2003
1

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