MP3274AP Datasheet

IC型號：
MP3274AP
PDF描述：
Fault Protected 32 Channel, 12-Bit Data Acquisition Subsyste...
文件大?。?/label>
173.28KB
PDF頁數(shù)：
16頁
芯片廠家：
EXAR

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MP3274

Fault Protected 32 Channel, 12-Bit

Data Acquisition Subsystem

FEATURES

鈥?/div>

Complete 32-Channel 12-Bit A/D Converter

with Sample & Hold, Reference, Clock and

3-State Outputs

鈥?/div>

Fast Conversion, less than 15碌S

鈥?/div>

Microprocessor Bus Interface

鈥?/div>

Parallel or Serial Data Output Modes

鈥?/div>

65 ns Bus Access Time

鈥?/div>

Remote Analog Ground Sensing

鈥?/div>

Overvoltage Protected Input (50 V over the

Supply Voltages)

鈥?/div>

Precision Reference for Long Term Stability and

Low Gain T.C.

鈥?/div>

Guaranteed Linearity Over Temperature

鈥?/div>

Guaranteed Performance at +12/鈥? V,

鹵12

鹵15

鈥?/div>

Low Power (3 mW per Channel Typical)

鈥?/div>

16 Channel Version: MP3276 & MP3275

GENERAL DESCRIPTION

The MP3274 is a complete 32-channel, 12-bit Data Acquisi-

tion Subsystem with 3-state output buffers for direct interfacing

to 16-bit microprocessor buses. Implemented using an ad-

vanced BiCMOS process, the converter combines a 32-channel

passive overvoltage protected multiplexer instrumentation amp,

a sample & hold, a SAR, a 12-bit decoded D/A, a comparator, a

precision reference and the control logic to achieve an accurate,

repeated conversion in less than 15碌s, and a mux/instrumenta-

tion amp settling period of less than 10碌s.

A unique input design provides input overvoltage protection

V over the supply voltages. Therefore, an overvoltage

condition can exist on unselected channels without disrupting

the measured channel or operation of the MP3274! The internal

4 V reference has sufficient output current to provide other sys-

tem reference needs. Precision thin film scaling and offset resis-

tors are laser trimmed to provide for less than 2 LSB INL for +10

V inputs on all channels.

In addition, the MP3274 will output either full scale (0111 ....)

for overrange and 鈥?full scale (1000....) for underrange condi-

tions. This greatly simplifies microprocessor software develop-

ment.

SIMPLIFIED BLOCK DIAGRAM

GND REF.

AGND

AB0-4

(5 pins)

AIN0-31

(32 pins)

32 Ch.

MUX

鈥?/div>

Comp

REF IN /2

AGND

REF

REF IN

REF OUT

REF

VDAC

CLK

SAR

AGND

Control

Logic

Latch/

Shift Register

3-State

Drivers

PXS

DGND V

AGND

WR RD

ADEN

STL

STS

DB0-DB11

Rev. 4.00

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