MM54HCT157 MM74HCT157 Quad 2-Input Multiplexer
MM54HCT158 MM74HCT158 Quad 2-Input Multiplexer (Inverted Output)
February 1988
MM54HCT157 MM74HCT157 Quad
2-Input Multiplexer
MM54HCT158 MM74HCT158
Quad 2-Input Multiplexer (Inverted Output)
General Description
These high speed QUAD 2-to-1 line data selector multiplex-
ers utilize advanced silicon-gate CMOS technology They
possess the high noise immunity and low power consump-
tion of standard CMOS integrated circuits as well as the
ability to drive 10 LS-TTL loads
These devices each consist of four 2-input digital multiplex-
ers with common select and OUTPUT ENABLE inputs On
the MM54HCT157 MM74HCT157 when the OUTPUT EN-
ABLE input is at logical 鈥樷€?鈥欌€?the four outputs assume the
values as selected from the inputs When the OUTPUT EN-
ABLE input is at a logical 鈥樷€?鈥欌€?the outputs assume logical
鈥樷€?鈥欌€?The MM54HCT158 MM74HCT158 operates in the
same manner except that its outputs are inverted Select
decoding is done internally resulting in a single select input
only If enabled the select input determines whether the A
or B inputs get routed to their corresponding Y outputs
The 54HCT 74HCT logic family is functionally as well as
pin-out compatible with the standard 54LS 74LS logic fami-
ly All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
CC
and ground
Features
Y
Y
Y
Y
Y
Y
Typical propagation delay 14 ns data to any output
Power supply range 5V
g
10%
Low power supply quiescent current 80
mA
maximum
(74HCT Series)
Low input current 1
mA
maximum
Completely TTL compatible
High output drive current 60 mA minimum
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TL F 5741 鈥?1
TL F 5741 鈥?2
Top View
Top View
Order Number MM54HCT157 158 or MM74HCT157 158
Function Table
Inputs
Strobe
H
L
L
L
L
Select
X
L
L
H
H
A
X
L
H
X
X
B
X
X
X
L
H
L
L
H
L
H
Output Y
HCT157
HCT158
H
H
L
H
L
H
e
High Level L
e
Low Level X
e
Irrelevant
C
1995 National Semiconductor Corporation
TL F 5741
RRD-B30M105 Printed in U S A
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2
3
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5
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