MM54HC20 MM74HC20 Dual 4-Input NAND Gate
January 1988
MM54HC20 MM74HC20
Dual 4-Input NAND Gate
General Description
These NAND gates utilize advanced silicon-gate CMOS
technology to achieve operating speeds similar to LS-TTL
gates with the low power consumption of standard CMOS
integrated circuits All gates have buffered outputs All de-
vices have high noise immunity and the ability to drive 10
LS-TTL loads The 54HC 74HC logic family is functionally
as well as pin-out compatible with the standard 54LS 74LS
logic family All inputs are protected from damage due to
static discharge by internal diode clamps to V
CC
and
ground
Features
Y
Y
Y
Y
Y
Typical propagation delay 8 ns
Wide power supply range 2 鈥?6V
Low quiescent current 20
mA
maximum (74HC Series)
Low input current 1
mA
maximum
Fanout of 10 LS-TTL loads
Connection and Logic Diagrams
Dual-In-Line Package
TL F 5299 鈥?1
Top View
Order Number MM54HC20 or MM74HC20
TL F 5299 鈥?2
C
1995 National Semiconductor Corporation
TL F 5299
RRD-B30M105 Printed in U S A