MM54HC173 MM74HC173 TRI-STATE Quad D Flip-Flop
January 1988
MM54HC173 MM74HC173
TRI-STATE Quad D Flip-Flop
General Description
The MM54HC173 MM74HC173 is a high speed TRI-STATE
QUAD D TYPE FLIP-FLOP that utilizes advanced silicon-
gate CMOS technology It possesses the low power con-
sumption and high noise immunity of standard CMOS inte-
grated circuits and can operate at speeds comparable to
the equivalent low power Schottky device The outputs are
buffered allowing this circuit to drive 15 LS-TTL loads The
large output drive capability and TRI-STATE feature make
this part ideally suited for interfacing with bus lines in a bus
oriented system
The four D TYPE FLIP-FLOPS operate synchronously from
a common clock The TRI-STATE outputs allow the device
to be used in bus organized systems The outputs are
placed in the TRI-STATE mode when either of the two out-
put disable pins are in the logic 鈥樷€?鈥欌€?level The input disable
allows the flip-flops to remain in their present states without
having to disrupt the clock If either of the 2 input disables
are taken to a logic 鈥樷€?鈥欌€?level the Q outputs are fed back to
the inputs forcing the flip flops to remain in the same state
Clearing is enabled by taking the CLEAR input to a logic 鈥樷€?鈥欌€?/div>
level The data outputs change state on the positive going
edge of the clock
The 54HC 74HC logic family is functionally as well as pin-
out compatible with the standard 54LS 74LS logic family
All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
CC
and ground
Features
Y
Y
Y
Y
Y
Y
Typical propagation delay 18 ns
Wide operating supply voltage range 2 鈥?6V
TRI-STATE outputs
Low input current 1
mA
maximum
Low quiescent supply current 80
mA
maximum (74HC)
High output drive current 6 mA minimum
Connection Diagram
Dual-In-Line Package
Truth Table
Inputs
Clear Clock
Data Enable
G1
G2
Data
D
Output
Q
H
X
X
X
X
L
L
L
X
X
X
Q
0
L
H
X
X
Q
0
u
L
X
H
X
Q
0
u
L
L
L
L
L
u
L
L
L
H
H
u
When either M or N (or both) is (are) high the out-
put is disabled to the high-impedance state how-
ever sequential operation of the flip-flops is not
affected
H
e
high level (steady state)
L
e
low level (steady state)
u
e
low-to-high level transition
X
e
don鈥檛 care (any input including transitions)
TL F 5317 鈥?1
Q
O
e
the level of Q before the indicated steady state input condi-
tions were established
Top View
Order Number MM54HC173 or MM74HC173
TRI-STATE
is a registered trademark of National Semiconductor Corp
TL F 5317
RRD-B30M105 Printed in U S A
C
1995 National Semiconductor Corporation
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