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MM74C90J Datasheet

  • MM74C90J

  • 4-Bit Decade, Binary Counter

  • 6頁

  • NSC

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MM54C90 MM74C90 4-Bit Decade Counter
MM54C93 MM74C93 4-Bit Binary Counter
February 1988
MM54C90 MM74C90 4-Bit Decade Counter
MM54C93 MM74C93 4-Bit Binary Counter
General Description
The MM54C90 MM74C90 decade counter and the
MM54C93 MM74C93 binary counter and complementary
MOS (CMOS) integrated circuits constructed with N- and
P-channel enhancement mode transistors The 4-bit decade
counter can reset to zero or preset to nine by applying ap-
propriate logic level on the R
01
R
02
R
91
and R
92
inputs
Also a separate flip-flop on the A-bit enables the user to
operate it as a divide-by-2 5 or 10 frequency counter The
4-bit binary counter can be reset to zero by applying high
logic level on inputs R
01
and R
02
and a separate flip-flop on
the A-bit enables the user to operate it as a divide-by-2 -8
or -16 divider Counting occurs on the negative going edge
of the input pulse
All inputs are protected against static discharge damage
Features
Y
Y
Y
Y
Y
Wide supply voltage range
Guaranteed noise margin
High noise immunity
Low power
TTL compatiblity
The MM54C93 MM74C93
MM74L93 Pinout
follows
3V to 15V
1V
0 45 V
CC
(typ )
Fan out of 2
driving 74L
the MM54L93
Connection and Logic Diagrams
MM54C90 MM74C90
Dual-In-Line Package
MM54C93 MM74C93
Dual-In-Line Package
TL F 5889 鈥?2
TL F 5889 鈥?4
Top View
Order Number MM54C90 or MM74C93
M54C90 MM74C90
Top View
MM54C93 MM74C93
TL F 5889 鈥?3
TL F 5889 鈥?1
C
1995 National Semiconductor Corporation
TL F 5889
RRD-B30M105 Printed in U S A

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