MM54C74 MM74C74 Dual D Flip-Flop
February 1988
MM54C74 MM74C74 Dual D Flip-Flop
General Description
The MM54C74 MM74C74 dual D flip-flop is a monolithic
complementary MOS (CMOS) integrated circuit constructed
with N- and P-channel enhancement transistors Each flip-
flop has independent data preset clear and clock inputs
and Q and Q outputs The logic level present at the data
input is transferred to the output during the positive going
transition of the clock pulse Preset or clear is independent
of the clock and accomplished by a low level at the preset
or clear input
Y
Y
Low power
Medium speed operation
50 nW (typ )
10 MHz (typ )
with 10V supply
Applications
Y
Y
Y
Y
Y
Features
Y
Y
Y
Supply voltage range
Tenth power TTL compatible
High noise immunity
3V to 15V
Drive 2 LPT
2
L loads
0 45 V
CC
(typ )
Y
Y
Y
Automotive
Data terminals
Instrumentation
Medical electronics
Alarm system
Industrial electronics
Remote metering
Computers
Logic Diagram
TL F 5885 鈥?1
Truth Table
Preset
0
0
1
1
Clear
0
1
0
1
Q
n
0
1
0
Q
n
Q
n
0
0
1
Q
n
Connection Diagram
Dual-In-Line Package
No change in output from previous state
Order Number MM54C74 or MM74C74
Top View
Note A logic 鈥樷€?鈥欌€?on clear sets Q to logic 鈥樷€?鈥欌€?/div>
A logic 鈥樷€?鈥欌€?on preset sets Q to logic 鈥樷€?鈥欌€?/div>
C
1995 National Semiconductor Corporation
TL F 5885
TL F 5885 鈥?2
RRD-B30M105 Printed in U S A
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