M34D64
M34D32
64/32 Kbit Serial I虜C Bus EEPROM
With Hardware Write Control on Top Quarter of Memory
PRELIMINARY DATA
s
s
Compatible with I
2
C Extended Addressing
Two Wire I
2
C Serial Interface
Supports 400 kHz Protocol
Single Supply Voltage:
鈥?4.5V to 5.5V for M34Dxx
鈥?2.5V to 5.5V for M34Dxx-W
鈥?1.8V to 3.6V for M34Dxx-R
s
8
1
PSDIP8 (BN)
0.25 mm frame
s
Hardware Write Control of the top quarter of
memory
BYTE and PAGE WRITE (up to 32 Bytes)
RANDOM and SEQUENTIAL READ Modes
Self-Timed Programming Cycle
Automatic Address Incrementing
Enhanced ESD/Latch-Up Behavior
More than 1 Million Erase/Write Cycles
More than 40 Year Data Retention
s
s
s
s
s
s
s
8
1
SO8 (MN)
150 mil width
DESCRIPTION
These electrically erasable programmable
memory (EEPROM) devices are fabricated with
STMicroelectronics鈥?High Endurance, CMOS
technology. This guarantees an endurance
typically well above one million Erase/Write
cycles, with a data retention of 40 years. The
memories are organized as 8192x8 bits (M34D64)
and 4096x8 bits (M34D32), and operate down to
Figure 1. Logic Diagram
VCC
Table 1. Signal Names
E0, E1, E2
SDA
Chip Enable Inputs
Serial Data/Address Input/
Output
Serial Clock
Write Control
Supply Voltage
Ground
3
E0-E2
SCL
WC
M34D64
M34D32
SDA
SCL
WC
V
CC
V
SS
VSS
AI02850
May 2000
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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