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M34C02-LDW6T Datasheet

  • M34C02-LDW6T

  • 2 Kbit Serial IC Bus EEPROM For DIMM Serial Presence Detec...

  • 19頁(yè)

  • STMICROELECTRONICS   STMICROELECTRONICS

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M34C02
2 Kbit Serial I虜C Bus EEPROM
For DIMM Serial Presence Detect
s
Two Wire I
2
C Serial Interface
Supports 400 kHz Protocol
Single Supply Voltage:
鈥?2.5V to 5.5V for M34C02-W
鈥?2.2V to 5.5V for M34C02-L
s
8
1
PSDIP8 (BN)
0.25 mm frame
s
s
s
s
s
s
s
s
Software Data Protection for lower 128 bytes
BYTE and PAGE WRITE (up to 16 bytes)
RANDOM and SEQUENTIAL READ Modes
Self-Timed Programming Cycle
Automatic Address Incrementing
Enhanced ESD/Latch-Up Protection
1 Million Erase/Write Cycles (minimum)
40 Year Data Retention (minimum)
8
1
SO8 (MN)
150 mil width
8
1
TSSOP8 (DW)
169 mil width
DESCRIPTION
The M34C02 is a 2 Kbit serial EEPROM memory
able to lock permanently the data in its first half
(from location 00h to 7Fh). This facility has been
designed specifically for use in DRAM DIMMs
(dual interline memory modules) with Serial
Presence Detect. All the information concerning
the DRAM module configuration (such as its
access speed, its size, its organization) can be
kept write protected in the first half of the memory.
This bottom half of the memory area can be write-
protected using a specially designed software
write protection mechanism. By sending the
device a specific sequence, the first 128 bytes of
Table 1. Signal Names
E0, E1, E2
SDA
Chip Enable Inputs
Figure 1. Logic Diagram
VCC
3
E0-E2
SCL
Serial Data/Address Input/
Output
Serial Clock
Write Control
Supply Voltage
Ground
SDA
M34C02
WC
SCL
WC
V
CC
V
SS
VSS
AI01931
December 1999
1/19

M34C02-LDW6T 產(chǎn)品屬性

  • 4,000

  • 集成電路 (IC)

  • 存儲(chǔ)器

  • -

  • EEPROMs - 串行

  • EEPROM

  • 2K (256 x 8)

  • 400kHz

  • I²C，2 線串口

  • 2.2 V ~ 5.5 V

  • -40°C ~ 85°C

  • 8-TSSOP（0.173"，4.40mm 寬）

  • 8-TSSOP

  • 帶卷 (TR)

  • 497-1722-2

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