鈻?/div>
SUPPLY VOLTAGE
鈥?V
DD
= 1.7V to 2.0V for program, erase and
read
鈥?V
DDQ
= 1.7V to 2.0V for I/O Buffers
鈥?V
PP
= 9V for fast program (12V tolerant)
SYNCHRONOUS / ASYNCHRONOUS READ
鈥?Synchronous Burst Read mode: 54MHz
鈥?Asynchronous Page Read mode
鈥?Random Access: 85ns
SYNCHRONOUS BURST READ SUSPEND
PROGRAMMING TIME
鈥?10碌s typical Word program time using
Buffer Program
MEMORY ORGANIZATION
鈥?Multiple Bank Memory Array: 8 Mbit
Banks
鈥?Parameter Blocks (Top or Bottom
location)
DUAL OPERATIONS
鈥?program/erase in one Bank while read in
others
鈥?No delay between read and write
operations
BLOCK LOCKING
鈥?All blocks locked at power-up
鈥?Any combination of blocks can be locked
with zero latency
鈥?WP for Block Lock-Down
鈥?Absolute Write Protection with V
PP
= V
SS
SECURITY
鈥?64 bit unique device number
鈥?2112 bit user programmable OTP Cells
COMMON FLASH INTERFACE (CFI)
100,000 PROGRAM/ERASE CYCLES per
BLOCK
Figure 1. Package
FBGA
TFBGA88 (ZAQ)
8 x 10mm
鈻?/div>
鈻?/div>
ELECTRONIC SIGNATURE
鈥?Manufacturer Code: 20h
鈥?Top Device Code: 88C4h.
鈥?Bottom Device Code: 88C5h
PACKAGE
鈥?Compliant with Lead-Free Soldering
Processes
鈥?Lead-Free Versions
December 2004
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