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M29F400T-55M1R Datasheet

  • M29F400T-55M1R

  • 4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash...

  • 232.41KB

  • 34頁(yè)

  • STMICROELECTRONICS   STMICROELECTRONICS

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M29F400T
M29F400B
4 Mbit (512Kb x8 or 256Kb x16, Boot Block)
Single Supply Flash Memory
NOT FOR NEW DESIGN
M29F400T and M29F400B are replaced
respectively by the M29F400BT and
M29F400BB
5V鹵10% SUPPLY VOLTAGE for PROGRAM,
ERASE and READ OPERATIONS
FAST ACCESS TIME: 55ns
FAST PROGRAMMING TIME
鈥?10碌s by Byte / 16碌s by Word typical
PROGRAM/ERASE CONTROLLER (P/E.C.)
鈥?Program Byte-by-Byte or Word-by-Word
鈥?Status Register bits and Ready/Busy Output
MEMORY BLOCKS
鈥?Boot Block (Top or Bottom location)
鈥?Parameter and Main blocks
BLOCK, MULTI-BLOCK and CHIP ERASE
MULTI-BLOCK PROTECTION/TEMPORARY
UNPROTECTION MODES
ERASE SUSPEND and RESUME MODES
鈥?Read and Program another Block during
Erase Suspend
LOW POWER CONSUMPTION
鈥?Stand-by and Automatic Stand-by
100,000 PROGRAM/ERASE CYCLES per
BLOCK
20 YEARS DATA RETENTION
鈥?Defectivity below 1ppm/year
ELECTRONIC SIGNATURE
鈥?Manufacturer Code: 0020h
鈥?Device Code, M29F400T: 00D5h
鈥?Device Code, M29F400B: 00D6h
DESCRIPTION
The M29F400 is a non-volatile memory that may
be erased electrically at the block or chip level and
programmed in-system on a Byte-by-Byte or Word-
by-Word basis using only a single 5V V
CC
supply.
For Program and Erase operations the necessary
high voltages are generated internally. The device
can also be programmed in standard program-
mers.
The array matrix organisation allows each block to
be erased and reprogrammed without affecting
other blocks. Blocks can be protected against pro-
November 1999
44
1
TSOP48 (N)
12 x 20 mm
SO44 (M)
Figure 1. Logic Diagram
VCC
18
A0-A17
W
E
G
RP
M29F400T
M29F400B
15
DQ0-DQ14
DQ15A鈥?
BYTE
RB
VSS
AI01726B
1/34
This is information on a product stil l in production but not recommended for new designs.

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