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M28C17-90MS1T Datasheet

  • M28C17-90MS1T

  • 16K 2K x 8 PARALLEL EEPROM with SOFTWARE DATA PROTECTION

  • 17頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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M28C17
16K (2K x 8) PARALLEL EEPROM
with SOFTWARE DATA PROTECTION
NOT FOR NEW DESIGN
FAST ACCESS TIME: 90ns
SINGLE 5V
鹵
10% SUPPLY VOLTAGE
LOW POWER CONSUMPTION
FAST WRITE CYCLE:
鈥?64 Bytes Page Write Operation
鈥?Byte or Page Write Cycle: 3ms Max
ENHANCED END OF WRITE DETECTION:
鈥?Ready/Busy Open Drain Output
鈥?Data Polling
鈥?Toggle Bit
PAGE LOAD TIMER STATUS BIT
HIGH RELIABILITY SINGLE POLYSILICON,
CMOS TECHNOLOGY:
鈥?Endurance >100,000 Erase/Write Cycles
鈥?Data Retention >40 Years
JEDEC APPROVED BYTEWIDE PIN OUT
SOFTWARE DATA PROTECTION
M28C17 is replaced by the products
described on the document M28C16A
DESCRIPTION
The M28C17 is a 2K x 8 low power Parallel
EEPROM fabricated with SGS-THOMSON pro-
prietary single polysilicon CMOS technology. The
device offers fast access time with low power dis-
sipation and requires a 5V power supply.
The M28C17 offers the same features than the
M28C16, in addition to the Ready/Busy pin.
The circuit has been designed to offer a flexible
microcontroller interface featuring both hardware
Table 1. Signal Names
A0 - A10
DQ0 - DQ7
W
E
G
RB
V
CC
V
SS
Address Input
Data Input / Output
Write Enable
Chip Enable
Output Enable
Ready / Busy
Supply Voltage
Ground
28
1
PDIP28 (P)
PLCC32 (K)
28
1
SO28 (MS)
300 mils
Figure 1. Logic Diagram
VCC
11
A0-A10
8
DQ0-DQ7
W
E
M28C17
RB
G
VSS
AI01487
November 1997
This is information on a product still in production but not recommended for new design.
1/17

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