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M28C16-150P1T Datasheet

  • M28C16-150P1T

  • 16K 2K x 8 PARALLEL EEPROM with SOFTWARE DATA PROTECTION

  • 18頁(yè)

  • STMICROELECTRONICS   STMICROELECTRONICS

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M28C16
16K (2K x 8) PARALLEL EEPROM
with SOFTWARE DATA PROTECTION
NOT FOR NEW DESIGN
FAST ACCESS TIME: 90ns
SINGLE 5V
鹵
10% SUPPLY VOLTAGE
LOW POWER CONSUMPTION
FAST WRITE CYCLE:
鈥?64 Bytes Page Write Operation
鈥?Byte or Page Write Cycle: 3ms Max
ENHANCED END OF WRITE DETECTION:
鈥?Data Polling
鈥?Toggle Bit
PAGE LOAD TIMER STATUS BIT
HIGH RELIABILITY SINGLE POLYSILICON,
CMOS TECHNOLOGY:
鈥?Endurance >100,000 Erase/Write Cycles
鈥?Data Retention >40 Years
JEDEC APPROVED BYTEWIDE PIN OUT
SOFTWARE DATA PROTECTION
M28C16 is replaced by the products
described on the document M28C16A
DESCRIPTION
The M28C16 is a 2K x 8 low power Parallel
EEPROM fabricatedwith SGS-THOMSON proprie-
tary single polysilicon CMOS technology. The de-
vice offers fast access time with low power
dissipation and requires a 5V power supply. The
circuit has been designed to offer a flexible micro-
controller interface featuring both hardware and
software handshaking with Data Polling and Toggle
Bit. The M28C16 supports 64 byte page write op-
eration. A Software Data Protection (SDP) is also
possible using the standard JEDEC algorithm.
Table 1. Signal Names
A0 - A10
DQ0 - DQ7
W
E
G
RB
V
CC
V
SS
Address Input
Data Input / Output
Write Enable
Chip Enable
Output Enable
Ready / Busy
Supply Voltage
Ground
24
1
PDIP24 (P)
PLCC32 (K)
24
1
SO24 (MS)
300 mils
TSOP28 (N)
8 x13.4mm
Figure 1. Logic Diagram
VCC
11
A0-A10
8
DQ0-DQ7
W
E
G
M28C16
RB *
VSS
AI01518B
Note:
* RB function is offered only with TSOP28 package.
November 1997
This is information on a product still in production bu t not recommended for new de sign.
1/18

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