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LXT384LE Datasheet

  • LXT384LE

  • Telecomm/Datacomm

  • 80頁

  • ETC

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LXT384
Octal T1/E1/J1 Line Interface Unit
Datasheet
The LXT384 is an octal short haul Pulse Code Modulation (PCM) Line Interface Unit for use in
both 1.544 Mbps (T1) and 2.048 Mbps (E1) applications. It incorporates eight independent
receivers and eight independent transmitters in a single 144 pin LQFP or 160 ball PBGA
package.
The LXT384 transmits shaped waveforms meeting G.703 and T1.102 specifications. The
transmit drivers provide low impedance independent of the transmit pattern and supply voltage
variations. The LXT384 exceeds the latest transmit return loss specifications, such as ETSI ETS-
300166. All transmitters include a power down mode with fast output tristate capability.
The LXT384鈥檚 differential receiver architecture provides high noise interference margin and is
able to work with up to 12 dB of cable attenuation. The optional digital clock recovery PLL and
jitter attenuator are referenced to a low frequency 1.544 MHz or 2.048 MHz clock.
The LXT384 incorporates an advanced crystal-less jitter attenuator switchable between the
receive and transmit path. The jitter attenuation performance meets the latest international
specifications such as CTR12/13. The jitter attenuation performance was optimized for
Sychronous Optical NETwork/Sychronous Digital Hierarchy (SONET/SDH) applications.
The LXT384 can be configured as a 7 channel transceiver with G.772 compliant non intrusive
protected monitoring points.
The LXT384 includes Hitless Protection Switching (HPS) feature which helps increase quality
of service and eliminates relays in redundancy and 1+1 protection applications. Fast tristate-able
drivers and a constant delay jitter attenuator are critical to achieving HPS.
Product Features
s
s
s
s
Single rail 3.3V supply with 5V tolerant
inputs
Low power consumption of 130mW per
channel (typ.)
Superior crystal-less jitter attenuator
鈥?Meets ETSI CTR12/13, ITU G.736,
G.742, G.823 and AT&T Pub 62411
specifications
鈥?Optimized for SONET/SDH
applications, meets ITU G.783 mapping
jitter specification
鈥?Constant throughput delay jitter
attenuator
Hitless Protection Switching (HPS) for 1 to
1 protection without relays
s
s
s
s
s
s
s
s
s
Transmit return loss exceeds ETSI ETS
300166
HDB3, B8ZS, or AMI line encoder/decoder
Provides protected monitoring points per
ITU G.772
Analog/digital and remote loopback testing
functions
LOS per ITU G.775, ETS 300 233 and
T1.231
8 bit parallel or 4 wire serial control
interface
Hardware and Software control modes
JTAG Boundary Scan test port per IEEE
1149.1
144 pin LQFP and 160 ball PBGA
packages
As of January 15, 2001, this document replaces the Level One document
known as
Octal T1/E1 Transceiver.
Order Number: 248994-001
January 2001

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