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DESCRIPTIO
Bidirectional Buffer* for SDA and SCL Lines
Increases Fanout
Prevents SDA and SCL Corruption During Live
Board Insertion and Removal from Backplane
Logic Threshold ENABLE Input
Isolates Input SDA and SCL Lines from Output
Compatible with I
2
C
TM
, I
2
C Fast Mode and SMBus
Standards (Up to 400kHz Operation)
1V Precharge on all SDA and SCL Lines
Supports Clock Stretching, Arbitration and
Synchronization
5V to 3.3V Level Translation
High Impedance SDA, SCL Pins for V
CC
= 0V,
V
CC2
= 0V
Small 8-Pin DFN and MSOP Packages
The LTC
廬
4300A-3 hot swappable 2-wire bus buffer allows
I/O card insertion into a live backplane without corruption
of the data and clock busses. When the connection is
made, the LTC4300A-3 provides bidirectional buffering,
keeping the backplane and card capacitances isolated.
Rise-time accelerator circuitry allows the use of weaker
DC pull-up currents while still meeting rise-time require-
ments. During insertion, the SDA and SCL lines are
precharged to 1V to minimize bus disturbances.
The LTC4300A-3 provides level translation between 3.3V
and 5V supplies. The backplane and card can both be
powered with supplies ranging from 2.7V to 5.5V. The
LTC4300A-3 also incorporates a CMOS threshold ENABLE
pin which forces the part into a low current mode and iso-
lates the card from the backplane. When driven to V
CC
, the
ENABLE pin sets normal operation.
The LTC4300A-3 is available in the MSOP and 3mm
脳
3mm
DFN packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Patent pending.
APPLICATIO S
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Hot Board Insertion
Servers
Capacitance Buffer/Bus Extender
Desktop Computer
TYPICAL APPLICATIO
V
CC
3.3V
0.01碌F
10k
10k
3
8
1
V
CC2
0.01碌F
10k
2
10k
OUTPUT
SIDE
50pF
0.5V/DIV
Input鈥揙utput Connection
SCLIN
SCLOUT
SDAIN
6
7
SDAOUT
5
OFF ON
LTC4300A-3
ENABLE
GND
4
4300A-3
TA01
U
INPUT
SIDE
150pF
200ns/DIV
4300A TA02
U
U
sn4300a3 4300a3fs
1
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