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DESCRIPTIO
No Current Sense Resistors Required
Out-of-Phase Controllers Reduce Required
Input Capacitance
V
OUT2
Tracks 1/2 V
REF
Symmetrical Source/Sink Output Current
Capability (V
OUT2
)
Spread Spectrum Operation (When Enabled)
Wide V
IN
Range: 2.75V to 9.8V
Constant Frequency Current Mode Operation
0.6V
鹵1.5%
Voltage Reference (V
OUT1
)
Low Dropout Operation: 100% Duty Cycle
True PLL for Frequency Locking or Adjustment
Internal Soft-Start Circuitry
Power Good Output Voltage Monitor
Output Overvoltage Protection
Micropower Shutdown: I
Q
= 9碌A(chǔ)
Tiny Low Profile (4mm
脳
4mm) QFN and Narrow
SSOP Packages
The LTC
廬
3776 is a 2-phase dual output synchronous step-
down switching regulator controller for DDR/QDR memory
termination applications. The second controller regulates
its output voltage to 1/2 V
REF
while providing symmetrical
source and sink output current capability.
The No R
SENSE
constant frequency current mode architec-
ture eliminates the need for sense resistors and improves
efficiency. Power loss and noise due to the ESR of the
input capacitance are minimized by operating the two
controllers out of phase.
The switching frequency can be programmed up to 750kHz,
allowing the use of small surface mount inductors and ca-
pacitors. For noise sensitive applications, the LTC3776
switching frequency can be externally synchronized from
250kHz to 850kHz, or can be enabled for spread spectrum
operation. Forced continuous operation reduces noise and
RF interference. Soft-start for V
OUT1
is provided internally
and can be extended using an external capacitor.
The LTC3776 is available in the tiny thermally enhanced
(4mm
脳
4mm) QFN package or 24-lead SSOP narrow
package.
, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode
is a registered trademark of Linear Technology Corporation.
No R
SENSE
is a trademark of
Linear Technology Corporation.
All other trademarks are the property of their respective
owners. Protected by U.S. Patents including
5481178, 5929620, 6144194, 6580258,
6304066, 6611131, 6498466, patent pending on Spread Spectrum.
APPLICATIO S
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DDR, DDR II and QDR Memory
SSTL, HSTL Termination Supplies
Servers, RAID Systems
Distributed DC Power Systems
TYPICAL APPLICATIO
High Efficiency, 2-Phase, DDR Memory (V
DDQ
and V
TT
) Supplies
V
IN
3.3V
V
IN
SENSE1
+
SENSE2
+
TG1
1.5碌H
SW1
LTC3776
BG1
PGND
(V
DDQ
)V
OUT1
2.5V
4A
187k
V
REF
V
FB1
470pF
59k
15k
I
TH1
SGND
V
FB2
I
TH2
2200pF
6.2k
3776 TA01a
10碌F
脳2
TG2
SW2
BG2
PGND
V
OUT2
(V
TT
)
1.25V
鹵4A
47碌F
1.5碌H
EFFICIENCY (%)
47碌F
U
Efficiency vs Load Current
100
90
80
70
60
50
40
30
20
10
0
10
FIGURE 14 CIRCUIT
CHANNEL 2 (V
IN
= 3.3V)
CHANNEL 1 (V
IN
= 5V)
CHANNEL 1 (V
IN
= 3.3V)
CHANNEL 2 (V
IN
= 5V)
100
1000
LOAD CURRENT (mA)
10000
3776 TA01b
U
U
3776f
1
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