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LTC2616IDD Datasheet

  • LTC2616IDD

  • 16-/14-/12-Bit Rail-to-Rail DACs with I2C Interface

  • 311.16KB

  • 20頁(yè)

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LTC2606/LTC2616/LTC2626
16-/14-/12-Bit Rail-to-Rail DACs
with I
2
C Interface
FEATURES
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DESCRIPTIO
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Smallest Pin-Compatible Single DACs:
LTC2606: 16 Bits
LTC2616: 14 Bits
LTC2626: 12 Bits
Guaranteed 16-Bit Monotonic Over Temperature
27 Selectable Addresses
400kHz I
2
C
TM
Interface
Wide 2.7V to 5.5V Supply Range
Low Power Operation: 270碌A(chǔ) at 3V
Power Down to 1碌A(chǔ), Max
High Rail-to-Rail Output Drive (鹵15mA, Min)
Double-Buffered Data Latches
Asynchronous DAC Update Pin
LTC2606/LTC2616/LTC2626: Power-On Reset to
Zero Scale
LTC2606-1/LTC2616-1/LTC2626-1: Power-On Reset
to Midscale
Tiny (3mm
脳
3mm) 10-Lead DFN Package
The LTC
廬
2606/LTC2616/LTC2626 are single 16-, 14-
and 12-bit, 2.7V-to-5.5V rail-to-rail voltage output DACs
in a 10-lead DFN package. They have built-in high perfor-
mance output buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply,
voltage-output DACs.
The parts use a 2-wire, I
2
C compatible serial interface. The
LTC2606/LTC2616/LTC2626 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock rate
of 400kHz). An asynchronous DAC update pin (LDAC) is
also included.
The LTC2606/LTC2616/LTC2626 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise less
than 10mV above zero scale; and after power-up, they stay
at zero scale until a valid write and update take place. The
power-on reset circuit resets the LTC2606-1/LTC2616-1/
LTC2626-1 to midscale. The voltage outputs stay at
midscale until a valid write and update take place.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
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Mobile Communications
Process Control and Industrial Automation
Instrumentation
Automatic Test Equipment
BLOCK DIAGRA
SCL
9
V
CC
6
REF
3
INPUT
REGISTER
I
2
C
INTERFACE
SDA
DAC
REGISTER
16-BIT DAC
V
OUT
7
2
CONTROL
LOGIC
DNL (LSB)
4
5
1
CA0
CA1
CA2
I
2
C
ADDRESS
DECODE
LDAC
10
GND
8
2606 BD
U
Differential Nonlinearity
(LTC2606)
1.0
0.8
0.6
0.4
0.2
0
鈥?.2
鈥?.4
鈥?.6
鈥?.8
鈥?.0
0
16384
32768
CODE
49152
65535
2606 G02
W
U
V
CC
= 5V
V
REF
= 4.096V
26061626f
1

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