Final Electrical Specifications
LTC2051
Dual Zero-Drift
Operational Amplifier
February 2000
FEATURES
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DESCRIPTIO
Maximum Offset Voltage of 3碌V
Maximum Offset Voltage Drift of 30nV/擄C
Small Footprint, Low Profile MS8 Package
Noise: 1.5碌V
P-P
(0.1Hz to 10Hz Typ)
Voltage Gain: 140dB (Typ)
PSRR: 130dB (Typ)
CMRR: 130dB (Typ)
Supply Current: 0.75mA (Typ) per Amplifier
Single Supply Operation: 2.7V to 11V
Extended Common Mode Input Range
Output Swings Rail-to-Rail
Overload Recovery Time: 2ms (Typ)
Operating Temperature Range 鈥?0擄C to 85擄C
The LTC
廬
2051 is a dual zero-drift operational amplifier
available in the MS8 and SO-8 packages. It operates from
a single 2.7V supply while still supporting
鹵5V
applica-
tions. The power consumption is 750碌A(chǔ) per op amp.
The LTC2051, despite its miniature size, features uncom-
promising DC performance. The typical input offset volt-
age and offset drift are 0.5碌V and 10nV/擄C. The almost
zero DC offset and drift are supported with a power supply
rejection ratio (PSRR) and common mode rejection ratio
(CMRR) of more than 130dB.
The input common mode voltage ranges from the negative
supply up to 1V from the positive supply. The LTC2051
also has an enhanced output stage capable of driving
loads as low as 1k鈩?to both supply rails. The open-loop
gain, loaded with 1k鈩? is in excess of 140dB. The LTC2051
also features a 1.5碌V
P-P
DC to 10Hz noise and a 3MHz gain
bandwidth product.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATI
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Thermocouple Amplifiers
Electronic Scales
Medical Instrumentation
Strain Gauge Amplifiers
High Resolution Data Acquisition
DC Accurate RC Active Filters
TYPICAL APPLICATI
High Performance Low Cost Instrumentation Amplifier
R1
499鈩?/div>
0.1%
R2
100k
0.1%
5V
R2
100k
0.1%
Input Referred Noise 0.1Hz to 10Hz
V
S
= 5V
3
鈥?/div>
碌V
2
8
1
鈥揤
IN
3
1/2
LTC2051HV
R1
499鈩?/div>
0.1%
1
0
鈥?
6
鈥?/div>
+
V
IN
5
1/2
LTC2051HV
4
鈥?V
7
A
V
= 201
鈥?
0
2051 TA01
+
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
2
6
4
TIME (s)
8
10
LT2051 TA02
UO
UO
1
1
2
3
4
