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LTC1850IFW Datasheet

  • LTC1850IFW

  • 8-Channel, 10-Bit/12-Bit, 1.25Msps Sampling ADCs

  • 28頁

  • LINER

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LTC1850/LTC1851
8-Channel, 10-Bit/12-Bit,
1.25Msps Sampling ADCs
DESCRIPTIO
The 10-bit LTC
1850 and 12-bit LTC1851 are complete
8-channel data acquisition systems. They include a flex-
ible 8-channel multiplexer, a 1.25Msps successive approxi-
mation analog-to-digital converter with sample-and-hold,
an internal 2.5V reference and reference buffer amplifier,
and a parallel output interface. The multiplexer can be con-
figured for single-ended or differential inputs, two gain
ranges and unipolar or bipolar operation.
The ADCs have a scan mode that will repeatedly cycle
through all 8 multiplexer channels and can also be
programmed with a sequence of up to 16 addresses and
configurations that can be scanned in succession. The
sequence memory can also be read back. The reference
and buffer amplifier provide pin strappable ranges of
4.096V, 2.5V and 2.048V. The parallel output includes
the 10-bit or 12-bit conversion result plus the 4-bit
multiplexer address. The digital outputs are powered
from a separate supply allowing for easy interface to 3V
digital logic. Typical power consumption is 40mW at
1.25Msps from a single 5V supply.
, LTC and LT are registered trademarks of Linear Technology Corporation.
FEATURES
s
s
s
s
s
s
s
s
s
s
s
s
Flexible 8-Channel Multiplexer
Single-Ended or Differential Inputs
Two Gain Ranges Plus Unipolar and Bipolar
Operation
1.25Msps Sampling Rate
Single 5V Supply and 40mW Power Dissipation
Scan Mode and Programmable Sequencer
Pin Compatible 10-Bit LTC1850 and 12-Bit LTC1851
True Differential Inputs Reject Common Mode Noise
Internal 2.5V Reference
Parallel Output Includes MUX Address
Easy Interface to 3V Logic
Nap and Sleep Shutdown Modes
APPLICATIO S
s
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s
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s
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High Speed Data Acquisition
Test and Measurement
Imaging Systems
Telecommunications
Industrial Process Control
Spectrum Analysis
BLOCK DIAGRA
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
2.5V
REFERENCE
8-CHANNEL
MULTIPLEXER
LTC1851
CONTROL LOGIC
AND
PROGRAMMABLE
SEQUENCER
INTERNAL
CLOCK
OV
DD
BUSY
DIFF
OUT
/S6
A2
OUT
/S5
A1
OUT
/S4
A0
OUT
/S3
D11/S2
D10/S1
D9/S0
D8
D7
D6
D5
D4
D3
D2
D1
D0
OGND
1851 BD
INL COC ERROR (LSBs)
M1
SHDN
CS
CONVST
RD
WR
DIFF
A2
A1
A0
UNI/BIP
PGA
M0
REFOUT
12-BIT
1.25Msps ADC
DATA
LATCHES
OUTPUT
DRIVERS
REFIN
REF AMP
REFCOMP
U
W
U
Integral Linearity, LTC1851
1.00
0.50
0.00
鈥?.50
鈥?.00
0
512 1024 1536 2048 2560 3072 3584 4096
CODE
LTC1850/51 G01
18501f
1

LTC1850IFW 產(chǎn)品屬性

  • LTC1850-51

  • 39

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器

  • -

  • 10

  • 1.25M

  • 并聯(lián)

  • 1

  • 50mW

  • 單電源

  • -40°C ~ 85°C

  • 表面貼裝

  • 48-TFSOP(0.240",6.10mm 寬)

  • 48-TSSOP

  • 管件

  • 8 個單端,單極;8 個單端,雙極;4 個差分,單極;4 個差分,雙極

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