LTC1748
14-Bit, 80Msps Low Noise ADC
FEATURES
s
s
s
s
s
s
s
s
s
DESCRIPTIO
s
Sample Rate: 80Msps
76.3dB SNR and 90dB SFDR (3.2V Range)
72.6dB SNR and 90dB SFDR (2V Range)
No Missing Codes
Single 5V Supply
Power Dissipation: 1.4W
Selectable Input Ranges:
鹵1V
or
鹵1.6V
240MHz Full Power Bandwidth S/H
Pin Compatible Family
25Msps: LTC1746 (14-Bit), LTC1745 (12-Bit)
50Msps: LTC1744 (14-Bit), LTC1743 (12-Bit)
65Msps: LTC1742 (14-Bit), LTC1741 (12-Bit)
80Msps: LTC1748 (14-Bit), LTC1747 (12-Bit)
48-Pin TSSOP Package
The LTC
廬
1748 is an 80Msps, sampling 14-bit A/D con-
verter designed for digitizing high frequency, wide dy-
namic range signals. Pin selectable input ranges of
鹵1V
and
鹵1.6V
along with a resistor programmable mode
allow the LTC1748鈥檚 input range to be optimized for a wide
variety of applications.
The LTC1748 is perfect for demanding communications
applications with AC performance that includes 76.3dB
SNR and 90dB spurious free dynamic range. Ultralow jitter
of 0.15ps
RMS
allows undersampling of IF frequencies with
excellent noise performance. DC specs include
鹵3LSB
INL
and no missing codes.
The digital interface is compatible with 5V, 3V, 2V and
LVDS logic systems. The ENC and ENC inputs may be
driven differentially from PECL, GTL and other low swing
logic families or from single-ended TTL or CMOS. The low
noise, high gain ENC and ENC inputs may also be driven
by a sinusoidal signal without degrading performance. A
separate output power supply can be operated from 0.5V
to 5V, making it easy to connect directly to any low voltage
DSPs or FIFOs.
The TSSOP package with a flow-through pinout simplifies
the board layout.
APPLICATIO S
s
s
s
s
s
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
BLOCK DIAGRA
A
IN+
鹵1V
DIFFERENTIAL
ANALOG INPUT
80Msps, 14-Bit ADC with a 2V Differential Input Range
OV
DD
0.1碌F
OF
D13
D0
CLKOUT
0.5V
TO 5V
0.1碌F
CORRECTION
LOGIC AND
SHIFT
REGISTER
14
A
IN鈥?/div>
S/H
AMP
14-BIT
PIPELINED ADC
SENSE
BUFFER
RANGE
SELECT
DIFF AMP
1碌F
GND
CONTROL LOGIC
1748 BD
V
CM
4.7碌F
2.35V
REF
REFLB
0.1碌F
1碌F
REFHA
4.7碌F
REFLA
REFHB ENC
ENC
0.1碌F
1碌F
DIFFERENTIAL
ENCODE INPUT
U
OUTPUT
LATCHES
鈥?/div>
鈥?/div>
鈥?/div>
OGND
V
DD
1碌F
5V
1碌F
MSBINV
OE
W
U
1748fa
1
next