LS840 LS841 LS842
Linear Integrated Systems
FEATURES
LOW NOISE
LOW LEAKAGE
LOW DRIFT
LOW OFFSET VOLTAGE
LOW NOISE LOW DRIFT
LOW CAPACITANCE
MONOLITHIC DUAL N-CHANNEL JFET
e
n
= 8nV/鈭欻z TYP.
I
G
= 10pA TYP.
|鈭哣
GS1-2
/鈭員|= 5碌V/擄C max.
IV
GS1-2
I= 2mV TYP.
ABSOLUTE MAXIMUM RATINGS NOTE 1
@ 25擄C (unless otherwise noted)
Maximum Temperatures
Storage Temperature
Operating Junction Temperature
-65擄 to +150擄C
+150擄C
D1
S1
G1
G2
S2
D2
31 X 32 MILS
G1
3
5
S2
D1
2
6
D2
Maximum Voltage and Current for Each Transistor NOTE 1
Gate Voltage to Drain or Source
60V
-V
GSS
-V
DSO
-I
G(f)
Drain to Source Voltage
Gate Forward Current
60V
50mA
1
S1
7
G2
Maximum Power Dissipation
Device Dissipation @ Free Air - Total
BOTTOM VIEW
400mW @ +125擄C
ELECTRICAL CHARACTERISTICS @ 25
擄
C (unless otherwise noted)
SYMBOL
CHARACTERISTICS
LS840 LS841 LS842 UNITS
5
10
40
碌V/擄C
|鈭哣
GS1-2
/鈭員| max. Drift vs. Temperature
|V
GS1-2
| max.
SYMBOL
BV
GSS
BV
GGO
Y
fss
Y
fs
|Y
fs1-2
/Y
fs
|
I
DSS
|I
DSS1-2
/I
DSS
|
V
GS
(off) or V
P
V
GS
-I
G
-I
G
-I
G
-I
GSS
Offset Voltage
CHARACTERISTICS
Breakdown Voltage
Gate-to-Gate Breakdown
TRANSCONDUCTANCE
Full Conduction
Typical Conduction
Mismatch
DRAIN CURRENT
Full Conduction
Mismatch at Full Conduction
GATE VOLTAGE
Pinchoff Voltage
Operating Range
GATE CURRENT
Operating
High Temperature
Reduced VDG
At Full Conduction
--
--
--
--
10
--
5
--
50
50
--
100
pA
nA
pA
pA
1
0.5
2
--
4.5
4
V
V
0.5
--
2
1
5
5
mA
%
1000
500
--
0.6
4000
1000
3
碌mho
碌mho
%
5
MIN.
60
60
10
TYP.
--
--
25
MAX.
--
--
mV
UNITS
V
V
CONDITIONS
V
DG
= 20V
T
A
= -55擄C to +125擄C
V
DG
= 20V
CONDITIONS
V
DS
= 0
I
D
= 1nA
I
G
= 1nA
V
DG
= 20V
V
DG
= 20V
I
D
= 0
V
GS
= 0
I
D
= 200碌A(chǔ)
I
D
= 200碌A(chǔ)
I
D
= 200碌A(chǔ)
I
S
= 0
f= 1kHz
V
DG
= 20V
V
GS
= 0
V
DS
= 20V
V
DS
= 20V
V
DG
= 20V
V
DG
= 20V
V
DG
= 10V
V
DG
= 20V
I
D
= 1nA
I
D
= 200碌A(chǔ)
I
D
= 200碌A(chǔ)
I
D
= 200碌A(chǔ)
I
D
= 200碌A(chǔ)
V
DS
= 0
T
A
= +125擄C
Linear Integrated Systems
4042 Clipper Court, Fremont, CA 94538 鈥?TEL: (510) 490-9160 鈥?FAX: (510) 353-0261
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