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MC14001 Datasheet

  • MC14001

  • ON Semiconductor [Single Supply Quad Comparators]

  • ONSEMI

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MC14001B Series
B鈭扴uffix Series CMOS Gates
MC14001B, MC14011B, MC14023B,
MC14025B, MC14071B, MC14073B,
MC14081B, MC14082B
The B Series logic gates are constructed with P and N channel
enhancement mode devices in a single monolithic structure
(Complementary MOS). Their primary use is where low power
dissipation and/or high noise immunity is desired.
Features
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP鈭?4
P SUFFIX
CASE 646
1
14
SOIC鈭?4
D SUFFIX
CASE 751A
1
14
TSSOP鈭?4
DT SUFFIX
CASE 948G
1
Value
鈭?.5 to +18.0
鈭?.5 to V
DD
+ 0.5
鹵
10
500
鈭?5 to +125
鈭?5 to +150
260
Unit
V
V
mA
mW
擄C
擄C
擄C
Device
MC14001B
MC14011B
MC14023B
MC14025B
MC14071B
MC14073B
MC14081B
MC14082B
xx
A
WL, L
YY, Y
WW, W
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
SOEIAJ鈭?4
F SUFFIX
CASE 965
1
14
MC140xxB
AWLYWW
14
0xxB
ALYW
140xxB
AWLYWW
MC140xxBCP
AWLYYWW
鈥?/div>
Supply Voltage Range = 3.0 Vdc to 18 Vdc
鈥?/div>
All Outputs Buffered
鈥?/div>
Capable of Driving Two Low鈭抪ower TTL Loads or One Low鈭抪ower
Schottky TTL Load Over the Rated Temperature Range.
鈥?/div>
Double Diode Protection on All Inputs Except: Triple Diode
Protection on MC14011B and MC14081B
鈥?/div>
Pin鈭抐or鈭扨in Replacements for Corresponding CD4000 Series
B Suffix Devices
鈥?/div>
Pb鈭扚ree Packages are Available*
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation, per Package
(Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
(8鈭扴econd Soldering)
DEVICE INFORMATION
Description
Quad 2鈭捍nput NOR Gate
Quad 2鈭捍nput NAND Gate
Triple 3鈭捍nput NAND Gate
Triple 3鈭捍nput NOR Gate
Quad 2鈭捍nput OR Gate
Triple 3鈭捍nput AND Gate
Quad 2鈭捍nput AND Gate
Dual 4鈭捍nput AND Gate
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
Plastic 鈥淧 and D/DW鈥?Packages: 鈥?7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high鈭抜mpedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2005
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
1
February, 2005 鈭?Rev. 4
Publication Order Number:
MC14001B/D

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