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LM12H458MEL/883 Datasheet

  • LM12H458MEL/883

  • 12-Bit Sign Data Acquisition System with Self-Calibration

  • 43頁

  • NSC

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LM12454/LM12458/LM12H458
12-Bit + Sign Data Acquisition System with Self-Calibration
July 1999
LM12454/LM12458/LM12H458
12-Bit + Sign Data Acquisition System with
Self-Calibration
General Description
The LM12454, LM12458, and LM12H458 are highly inte-
grated Data Acquisition Systems. Operating on just 5V, they
combine a fully-differential self-calibrating (correcting linear-
ity and zero errors) 13-bit (12-bit + sign) analog-to-digital
converter (ADC) and sample-and-hold (S/H) with extensive
analog functions and digital functionality. Up to 32 consecu-
tive conversions, using two鈥檚 complement format, can be
stored in an internal 32-word (16-bit wide) FIFO data buffer.
An internal 8-word RAM can store the conversion sequence
for up to eight acquisitions through the LM12(H)458鈥檚
eight-input multiplexer. The LM12454 has a four-channel
multiplexer, a differential multiplexer output, and a differential
S/H input. The LM12454 and LM12(H)458 can also operate
with 8-bit + sign resolution and in a supervisory 鈥渨atchdog鈥?/div>
mode that compares an input signal against two program-
mable limits.
Programmable acquisition times and conversion rates are
possible through the use of internal clock-driven timers. The
reference voltage input can be externally generated for ab-
solute or ratiometric operation or can be derived using the in-
ternal 2.5V bandgap reference.
All registers, RAM, and FIFO are directly addressable
through the high speed microprocessor interface to either an
8-bit or 16-bit databus. The LM12454 and LM12(H)458 in-
clude a direct memory access (DMA) interface for
high-speed conversion data transfer.
An evaluation/interface board is available. Order num-
ber LM12458EVAL.
Additional applications information can be found in applica-
tions notes AN-906, AN-947 and AN-949.
Key Specifications
(f
CLK
= 5 MHz; 8 MHz, H)
j
j
j
j
j
j
j
j
j
j
Resolution
13-bit conversion time
9-bit conversion time
13-bit Through-put rate
Comparison time
(鈥渨atchdog鈥?mode)
ILE
V
IN
range
Power dissipation
Stand-by mode
Single supply
12-bit + sign or 8-bit + sign
8.8 碌s, 5.5 碌s (H) (max)
4.2 碌s, 2.6 碌s (H) (max)
88k samples/s (min),
140k samples/s (H) (min)
2.2 碌s (max),
1.4 碌s (H) (max)
鹵
1 LSB (max)
GND to V
A+
30 mW, 34 mW (H) (max)
50 碌W (typ)
3V to 5.5V
Features
n
Three operating modes: 12-bit + sign, 8-bit + sign, and
鈥渨atchdog鈥?/div>
n
Single-ended or differential inputs
n
Built-in Sample-and-Hold and 2.5V bandgap reference
n
Instruction RAM and event sequencer
n
8-channel (LM12(H)458), 4-channel (LM12454)
multiplexer
n
32-word conversion FIFO
n
Programmable acquisition times and conversion rates
n
Self-calibration and diagnostic mode
n
8- or 16-bit wide databus dmicroprocessor or DSP
interface
Applications
n
n
n
n
n
Data Logging
Instrumentation
Process Control
Energy Management
Inertial Guidance
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
AT
廬
is a registered trademark of International Business Machines Corporation.
漏 1999 National Semiconductor Corporation
DS011264
www.national.com

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