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LF3320QC15 Datasheet

  • LF3320QC15

  • Horizontal Digital Image Filter

  • 24頁(yè)

  • LOGIC

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LF3320
DEVICES INCORPORATED
Horizontal Digital Image Filter
LF3320
DEVICES INCORPORATED
Horizontal Digital Image Filter
DESCRIPTION
The
LF3320
filters digital images in the
horizontal dimension at real-time
video rates. The input and coefficient
data are both 12 bits and in two鈥檚
complement format. The output is also
in two鈥檚 complement format and may
be rounded to 16 bits.
The LF3320 is designed to take
advantage of symmetric coefficient
sets. When symmetric coefficient sets
are used, the device can be configured
as a single 32-tap FIR filter or as two
separate 16-tap FIR filters.
When asymmetric coefficient sets are
used, the device can be configured as a
single 16-tap FIR filter or as two
separate 8-tap FIR filters. Multiple
LF3320s can be cascaded to create
larger filters.
Interleave/Decimation Registers (I/D
Registers) allow interleaved data to be
fed directly into the device and filtered
without separating the data into
individual data streams.
The LF3320 can handle a maximum of
sixteen data sets interleaved together.
The I/D Registers and on-chip accu-
mulators facilitate using decimation to
increase the number of filter taps.
Decimation of up to 16:1 is supported.
The LF3320 contains enough on-board
memory to store 256 coefficient sets.
Two separate LF Interfaces
TM
allow all
256 coefficient sets to be updated within
vertical blanking.
FEATURES
鉂?/div>
83 MHz Data Rate
鉂?/div>
12-bit Data or Coefficients (Expand-
able to 24-bit)
鉂?/div>
32-Tap FIR Filter, Cascadable for
More Filter Taps
鉂?/div>
Over 49 K-bits of on-board Memory
鉂?/div>
LF Interface
TM
Allows All 256
Coefficient Sets to be Updated
Within Vertical Blanking
鉂?/div>
Various Operating Modes: Dual
Filter, Single Filter, Double Wide
Data or Coefficient, Matrix Multipli-
cation, and Accumulator Access.
鉂?/div>
Selectable 16-bit Data Output with
User-Defined Rounding and Limiting
鉂?/div>
Supports Interleaved Data Streams
鉂?/div>
Supports Decimation up to 16:1 for
Increasing Number of Filter Taps
鉂?/div>
3.3 Volt Supply
鉂?/div>
144 Lead PQFP
LF3320 B
LOCK
D
IAGRAM
ROUT
11-0
12
12
RIN
11-0
DIN
11-0
CAA
7-0
CENA
CFA
11-0
PAUSEA
LDA
12
INTERLEAVE / DECIMATION
REGISTERS
12
COUT
11-0
CAB
7-0
8
8
CENB
12
256
COEFFICIENT
SET
STORAGE
16-TAP
FILTER A
16-TAP
FILTER B
256
COEFFICIENT
SET
STORAGE
12
CFB
11-0
PAUSEB
LDB
ROUND
SELECT
LIMIT
CIRCUITRY
CLK
OED
16
DOUT
15-0
Video Imaging Products
2-1
08/16/2000鈥揕DS.3320-N

LF3320QC15相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
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  • 英文版
    VERY LOW DROP VOLTAGE REGULATORS WITH INHIBIT
    STMICROELECTRONICS
  • 英文版
    VERY LOW DROP VOLTAGE REGULATORS WITH INHIBIT
    STMICROELECTRON...
  • 英文版
    VERY LOW DROP VOLTAGE REGULATORS WITH INHIBIT
    STMICROELECTRON...
  • 英文版
    Dual Line Buffer/FIFO
    LOGIC
  • 英文版
    Dual Line Buffer/FIFO
    LODEV [LOG...
  • 英文版
    Horizontal / Vertical Digital Image Filter
    LOGIC
  • 英文版
    Horizontal / Vertical Digital Image Filter
    LODEV [LOG...
  • 英文版
    12-Mbit Frame Buffer / FIFO
    LOGIC
  • 英文版
    LOGIC Devices Incorporated [12-Mbit Frame Buffer / FIFO]
    LODEV
  • 英文版
    Horizontal Digital Image Filter
    LOGIC
  • 英文版
    Horizontal Digital Image Filter
    LODEV [LOG...
  • 英文版
    Horizontal Digital Image Filter Improved Performance
    LOGIC
  • 英文版
    LOGIC Devices Incorporated [Horizontal Digital Image Filter...
    LODEV
  • 英文版
    Vertical Digital Image Filter
    LOGIC
  • 英文版
    Vertical Digital Image Filter
    LODEV [LOG...
  • 英文版
    8-Bit Vertical Digital Image Filter
    LOGIC
  • 英文版
    8-Bit Vertical Digital Image Filter
    LODEV [LOG...
  • 英文版
    High-Speed Image Filter with Coefficient RAM
    LOGIC
  • 英文版
    High-Speed Image Filter with Coefficient RAM
    LODEV [LOG...
  • 英文版
    High-Definition Video Format Converter
    LOGIC

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