鈥?/div>
Fabricated in a CMOS (P-sub) high-voltage process.
LCD drive voltage: 36 V
Logic system power-supply voltage: 3.0 to 5.5 V
f
load
max: 1 MHz
Slim chip (output pads are concentrated on one of the
longer sides)
240 outputs (pad pitch: 70 碌m)
Bidirectional shift register
The shift register can be split into two 120-bit registers.
DISPOFF function that locks the drive voltages output
to the LCD at fixed levels.
Display duty: 1/160 to 1/480
Specifications
Absolute Maximum Ratings
at Ta = 25擄C 鹵 2擄C, standard V
SS
, V
EEn
= V
EE1
or V
EE2
, V
SSn
= V
SS1
or V
SS2
Parameter
Symbol
V
DD
Supply voltage
V
EEn
V
SSn
V
IN
Input voltage
V
0
, V
1
V
4
V
5
Operating temperature
Storage temperature
Topr
Tstg
LOAD, L/R, DISP, DF, EIO1, EIO3, EIO4
Conditions
Ratings
鈥?.3 to +7
鈥?.3 to +40
鈥?.3 to +0.3
鈥?.3 to V
DD
+ 0.3
V
EE
鈥?7 to V
DD
+ 0.3
鈥?.3 to V
SS
+ 7
鈥?.3 to +0.3
鈥?0 to +75
鈥?5 to +125
Unit
V
V
V
V
V
V
V
擄C
擄C
Note: The voltages V
1
, V
2
, V
3
, V
4
, and V
5
must obey the relationships V
EEn
+ 0.3
鈮?/div>
V
0
鈮?/div>
V
1
鈮?/div>
V
EE
鈥?7, and 7
鈮?/div>
V
4
鈮?/div>
V
5
鈮?/div>
V
SSn
鈥?0.3. (Unit: V)
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
93096HA (OT)/31596HA (OT) No. 5279-1/8
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