KM6264BLG-10 Datasheet

IC型號：
KM6264BLG-10
PDF描述：
8Kx8 bit Low Power CMOS Static RAM
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155.49KB
PDF頁數(shù)：
10頁
芯片廠家：
SAMSUNG

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KM6264B Family

8Kx8 bit Low Power CMOS Static RAM

FEATURE SUMMARY

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Process Technology : CMOS

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Organization : 8K x 8

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Power Supply Voltage : Single 5V 鹵 10%

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Low Data Retention Voltage : 2V(Min)

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Three state output and TTL Compatible

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Package Type : JEDEC Standard

28-DIP, 28-SOP

CMOS SRAM

GENERAL DESCRIPTION

The KM6264B family is fabricated by SAMSUNG's

advanced CMOS process technology. The family

can support various operating temperature ranges

and has various package types for user flexibility of

system design. The family also support low data

retention voltage for battery back-up operations with

low data retention current.

PRODUCT FAMILY

Product

Family

KM6264BL

KM6264BL-L

KM6264BLE

KM6264BLE-L

KM6264BLI

KM6264BLI-L

Operating

Temperature

Commercial

(0~70 擄C)

Extended

(-25~-85 擄C)

Industrial

(-40~85 擄C)

Speed

PKG Type

Power Dissipation

Standby(Isb1, Max) Operating(Icc2)

100uA

70/100/120ns 28-DIP, 28-SOP

100*ns

28-SOP

10uA

100uA

50uA

100uA

50uA

55mA

* measured with 30pF test load

PIN DESCRIPTION

N.C

A12

I/O1

I/O2

I/O3

Vss

Vcc

/WE

FUNCTIONAL BLOCK DIAGRAM

Y-Decoder

X-Decoder

Control Logic

CS2

A11

/OE

A10

/CS1

I/O8

I/O7

I/O6

I/O5

I/O4

Cell Array

A0~A12

28-Pin DIP

28-Pin SOP

I/O1~8

I/O Buffer

Function

/CS1, CS2

/WE, /OE

Pin Name

A0~A12

/WE

/CS1, CS2

/OE

I/O1~I/O8

Vcc

Vss

N.C

Address Inputs

Write Enable Input

Chip Select Input

Output Enable Input

Data Input/Output

Power(5V)

Ground

No Connection

ELECTRONICS

Revision. 0.0

Auust. 1996

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