KM62256C Family
32Kx8 bit Low Power CMOS Static RAM
FEATURES
隆脺
隆脺
PRELIMINARY
CMOS SRAM
GENERAL DESCRIPTION
The KM62256C family is fabricated by SAMSUNG's advanced
CMOS process technology. The family can support various
operating temperature ranges and has various package types
for user flexibility of system design. The family also support low
data retention voltage for battery back-up operation with low
data retention current.
隆脺
隆脺
隆脺
隆脺
Process Technology : 0.7
摟-
CMOS
Organization : 32Kx8
Power Supply Voltage : Single 5V
隆戮
10%
Low Data Retention Voltage : 2V(Min)
Three state output and TTL Compatible
Package Type : JEDEC Standard
28-DIP, 28-SOP, 28-TSOP I -Forward/Reverse
PRODUCT FAMILY
Power Dissipation
Product
Family
KM62256CL
KM62256CL-L
KM62256CLE
KM62256CLE-L
KM62256CLI
KM62256CLI-L
* The parameter is measured with 30pF test load.
Operating
Temperature.
Speed
(ns)
PKG Type
Standby
(I
SB1
, Max)
100
摟脣
20
摟脣
100
摟脣
50
摟脣
100
摟脣
50
摟脣
Operating
(Icc
2
)
Commercial (0~70
隆脡
)
Extended (-25~85
隆脡
)
Industrial (-40~85
隆脡
)
45*/55/70ns
70/100ns
70/100ns
28-DIP, 28-SOP
28-TSOP I R/F
28-SOP
28-TSOP I R/F
28-SOP
28-TSOP I R/F
70mA
PIN DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
A
0
~A
2,
A
9~11
OE
A
11
A
9
A
8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
A
10
CS
I/O
8
I/O
7
Y-Decoder
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
1
I/O
2
I/O
3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
V
CC
WE
A
13
A
8
A
9
A
11
OE
A
10
CS
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
X-Decoder
A
13
WE
V
CC
A
14
A
12
A
7
A
6
A
5
A
4
A
3
I/O
6
I/O
5
I/O
4
V
SS
I/O
3
I/O
2
I/O
1
A
0
A
1
A
2
28-TSOP
Type I - Forward
23
22
21
20
19
18
17
16
15
A
3
~A
8,
A
12~14
Cell
Array
Control Logic
CS
WE,OE
28-DIP
28-SOP
22
21
20
19
18
17
16
15
I/O
1
~
8
A
3
A
4
A
5
A
6
A
7
A
12
A
14
V
CC
WE
A
13
A
8
A
9
A
11
OE
14
13
12
11
10
9
8
7
6
5
4
3
2
1
15
16
17
18
19
20
I/O Buffer
A
2
A
1
A
0
I/O
1
I/O
2
I/O
3
V
SS
I/O
4
I/O
5
I/O
6
I/O
7
I/O
8
CS
A
10
28-TSOP
Type I - Reverse
NameName
A
0
~A
14
WE
CS
OE
I/O
1
~I/O
8
Vcc
Vss
Function
Address Inputs
Write Enable Input
Chip Select Input
Output Enable Input
Data Inputs/Outputs
Power(5V)
Ground
21
22
23
24
25
26
27
28
Revision 3.0
April 1996