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KK74LV138D Datasheet

  • KK74LV138D

  • 3-to-8 line decoder/demultiplexer; inverting

  • 6頁

  • KODENSHI

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TECHNICAL DATA
3-to-8 line decoder/demultiplexer;
inverting
The
KK74LV138
is a low-voltage Si-gate CMOS device and is pin
and function compatible 74HCT138.
The74LV138 accepts three binary weighted address inputs -
(A
0
,A
1
,A
2
) and when enabled, provide 8 - mutually exclusive active
LOW outputs (Y
0
to Y
7
).
The 鈥?38鈥?features three enable inputs: two active LOW (CS
2
,CS
3
and one active HIGH (CS
1
).Every output will be HIGH unless CS
2
, and
CS
3
are LOW and CS
1
is HIGH.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Optimized for Low Voltage applications:1.2 to 3.6 V
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
Output capability: standard
KK74LV138
N SUFFIX
PLASTIC
16
1
16
1
D SUFFIX
SOIC
ORDERING INFORMATION
KK74LV138N
Plastic
KK74LV138D
SOIC
T
A
= -40擄 to 125擄 C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
CS1 CS2 CS3
X X H
X H X
L X X
H
H
H
H
H
H
H
H
Outputs
A2 A1 A0
X X X
X X X
X X X
L
L
L
L
H
H
H
H
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
H H H H H H H H
H H H H H H H H
H H H H H H H H
L
H
H
H
H
H
H
H
PIN 16 =V
CC
PIN 8 = GND
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H = high level (steady state)
L = low level (steady state)
X = don鈥檛 care
1

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