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K9F6408U0B-TCB0 Datasheet

  • K9F6408U0B-TCB0

  • 8M x 8 Bit NAND Flash Memory

  • 414.57KB

  • 27頁

  • SAMSUNG   SAMSUNG

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K9F6408U0B-TCB0, K9F6408U0B-TIB0
Document Title
8M x 8 Bit NAND Flash Memory
FLASH MEMORY
Revision History
Revision No. History
0.0
Initial issue.
1. Changed endurance : 1 million -> 100K program/erase cycles
Draft Date
July 17th 2000
Remark
Preliminary
0.1
1. Changed don鈥?care mode in address cycles
t
Nov. 20th 2000
- *X can be "High" or "Low" => *L must be set to "Low"
2. Explain how pointer operation works in detail.
3. Renamed GND input (pin # 6) on behalf of SE (pin # 6)
- The SE input controls the access of the spare area. When SE is high,
the spare area is not accessible for reading or programming. SE is rec
ommended to be coupled to GND or Vcc and should not be toggled
during reading or programming.
=> Connect this input pin to GND or set to static low state unless the
sequential read mode excluding spare area is used.
4. Updated operation for tRST timing
- If reset command(FFh) is written at Ready state, the device goes into
Busy for maximum 5us.
1.Powerup sequence is added
: Recovery time of minimum 1碌s is required before internal circuit gets
ready for any command sequences
~ 2.5V
0.2
Jul. 25th. 2001
鈮?/div>
~ 2.5V
V
CC
High
WP
WE
2. AC parameter tCLR(CLE to RE Delay, min 50ns) is added.
3. AC parameter tAR1 value : 100ns --> 20ns
Note : For more detailed features and specifications including FAQ, please refer to Samsung鈥?Flash web site.
s
http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the
SAMSUNG branch office near you.
鈮?/div>
1碌
鈮?/div>
1

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