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JS28F256J3A-115 Datasheet

  • JS28F256J3A-115

  • Intel StrataFlash Memory (J3)

  • 72頁

  • INTEL   INTEL

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Intel StrataFlash
廬
Memory (J3)
256-Mbit (x8/x16)
Datasheet
Product Features
鈻?/div>
鈻?/div>
鈻?/div>
Performance
鈥?110/115/120/150 ns Initial Access Speed
鈥?125 ns Initial Access Speed (256 Mbit
density only)
鈥?25 ns Asynchronous Page mode Reads
鈥?30 ns Asynchronous Page mode Reads
(256Mbit density only)
鈥?32-Byte Write Buffer
鈥?.8 碌s per byte effective
programming time
Software
鈥?Program and Erase suspend support
鈥?Flash Data Integrator (FDI), Common
Flash Interface (CFI) Compatible
Security
鈥?128-bit Protection Register
鈥?4-bit Unique Device Identifier
鈥?4-bit User Programmable OTP Cells
鈥?Absolute Protection with V
PEN
= GND
鈥?Individual Block Locking
鈥?Block Erase/Program Lockout during
Power Transitions
鈻?/div>
鈻?/div>
鈻?/div>
Architecture
鈥?Multi-Level Cell Technology: High
Density at Low Cost
鈥?High-Density Symmetrical 128-Kbyte
Blocks
鈥?56 Mbit (256 Blocks) (0.18碌m only)
鈥?28 Mbit (128 Blocks)
鈥?4 Mbit (64 Blocks)
鈥?2 Mbit (32 Blocks)
Quality and Reliability
鈥?Operating Temperature:
-40 擄C to +85 擄C
鈥?100K Minimum Erase Cycles per Block
鈥?0.18 碌m ETOX鈩?VII Process (J3C)
鈥?0.25 碌m ETOX鈩?VI Process (J3A)
Packaging and Voltage
鈥?56-Lead TSOP Package
鈥?64-Ball Intel
廬
Easy BGA Package
鈥?Lead-free packages available
鈥?48-Ball Intel
廬
VF BGA Package (32 and
64 Mbit) (x16 only)
鈥?V
CC
=
2.7 V to 3.6 V
鈥?V
CCQ
= 2.7 V to 3.6 V
Capitalizing on Intel鈥檚 0.25 and 0.18 micron, two-bit-per-cell technology, the Intel StrataFlash
廬
Memory (J3)
device provides 2X the bits in 1X the space, with new features for mainstream performance. Offered in 256-
Mbit (32-Mbyte), 128-Mbit (16-Mbyte), 64-Mbit, and 32-Mbit densities, the J3 device brings reliable, two-bit-
per-cell storage technology to the flash market segment. Benefits include more density in less space, high-speed
interface, lowest cost-per-bit NOR device, support for code and data storage, and easy migration to future
devices.
Using the same NOR-based ETOX鈩?technology as Intel鈥檚 one-bit-per-cell products, the J3 device takes
advantage of over one billion units of flash manufacturing experience since 1987. As a result, J3 components
are ideal for code and data applications where high density and low cost are required. Examples include
networking, telecommunications, digital set top boxes, audio recording, and digital imaging.
By applying FlashFile鈩?memory family pinouts, J3 memory components allow easy design migrations from
existing Word-Wide FlashFile memory (28F160S3 and 28F320S3), and first generation Intel StrataFlash
廬
memory (28F640J5 and 28F320J5) devices.
J3 memory components deliver a new generation of forward-compatible software support. By using the
Common Flash Interface (CFI) and the Scalable Command Set (SCS), customers can take advantage of density
upgrades and optimized write capabilities of future Intel StrataFlash
廬
memory devices. Manufactured on Intel
廬
0.18 micron ETOX鈩?VII (J3C) and 0.25 micron ETOX鈩?VI (J3A) process technology, the J3 memory device
provides the highest levels of quality and reliability.
Notice:
This document contains information on new products in production. The specifications are
subject to change without notice. Verify with your local Intel sales office that you have the latest
datasheet before finalizing a design.
Order Number: 290667-021
March 2005

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