MICROCIRCUIT DATA SHEET
MJCD4050A-X REV 1A0
NON-INVERTING HEX BUFFER
General Description
This hex buffer is a monolithic complementary MOS (CMOS) integrated circuit constructed
with N- and P- channel enhancement mode transistors. This device features logic level
conversion using only one supply voltage (VDD). The input signal high level (VIH) can
exceed the VDD supply voltage when the device is used for logic conversion. The device is
intended for use as a hex buffer, CMOS to DTL/TTL converter or as a CMOS current driver,
and at VDD = 5.0V, it can drive two DTL/TTL loads over the full operating temperature
range.
Original Creation Date: 07/27/99
Last Update Date: 10/18/99
Last Major Revision Date: 09/21/99
Industry Part Number
CD4050A
NS Part Numbers
JM4050ABEA
JM4050ABFA
Prime Die
CD4050A
Controlling Document
38510/05504, amend. #3
Processing
MIL-STD-883, Method 5004
Subgrp Description
1
2
3
4
5
6
7
8A
8B
9
10
11
Static tests at
Static tests at
Static tests at
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Temp (
o
C)
+25
+125
-55
+25
+125
-55
+25
+125
-55
+25
+125
-55
Quality Conformance Inspection
MIL-STD-883, Method 5005
1