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JM38510/37001BCA Datasheet

  • JM38510/37001BCA

  • QUADRUPLE 2-INPUT POSITIVE-NAND GATES

  • 8頁(yè)

  • TI

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SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SDAS187A 鈥?APRIL 1982 鈥?REVISED DECEMBER 1994
鈥?/div>
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
SN54ALS00A, SN54AS00 . . . J PACKAGE
SN74ALS00A, SN74AS00 . . . D OR N PACKAGE
(TOP VIEW)
description
These devices contain four independent 2-input
positive-NAND gates. They perform the Boolean
functions Y = A
鈥?/div>
B or Y = A + B in positive logic.
The SN54ALS00A and SN54AS00 are
characterized for operation over the full military
temperature range of 鈥?55擄C to 125擄C. The
SN74ALS00A and SN74AS00 are characterized
for operation from 0擄C to 70擄C.
FUNCTION TABLE
(each gate)
INPUTS
A
H
L
X
B
H
X
L
OUTPUT
Y
L
H
H
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
4B
4A
4Y
3B
3A
3Y
SN54ALS00A, SN54AS00 . . . FK PACKAGE
(TOP VIEW)
1B
1A
NC
V
CC
1Y
NC
2A
NC
2B
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
4B
4A
NC
4Y
NC
3B
logic symbol
鈥?/div>
1A
1B
2A
2B
3A
3B
4A
4B
1
2
4
5
9
10
12
13
11
4Y
8
3Y
6
&
3
1Y
NC 鈥?No internal connection
2Y
鈥?This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1994, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
2Y
GND
NC
3Y
3A
1

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