This is an advance copy of the dated document. The final document from Defense Automated Printing Service may be slightly
different in format due to electronic conversion processes. Actual technical content will be the same.
The documentation and process conversion
measures necessary to comply with this
revision shall be completed by 10 November 1998.
INCH-POUND
MIL-PRF-19500/270G
10 August 1998
SUPERSEDING
MIL-PRF-19500/270F
19 January 1998
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, UNITIZED, DUAL-TRANSISTOR, NPN,
SILICON, TYPES 2N2060 AND 2N2060L
JAN, JANTX, JANTXV, AND JANS
This specification is approved for use by all Depart-
ments and Agencies of the Department of Defense.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for two electrically isolated, matched NPN, silicon transistors as
one dual unit. Four levels of product assurance are provided for each device type as specified in MIL-PRF-19500.
1.2 Physical dimensions. See figure 1 (similar to TO-77 or TO-99).
1.3 Maximum ratings.
P
T1
T
A
= +25
q
C
One
section
1/
Both
sections
2/
P
T2
T
C
= +25
q
C
One
section
1/
Both
sections
2/
I
C
V
CBO
V
CEO
V
EBO
T
STG
and T
J
mW
mW
W
W
mA dc
V dc
V dc
V dc
q
C
-65 to +200
540
600
1.5
2.12
500
100
60
7
1/ For T
A
> +25
q
C, derate linearly 3.08 mW/
q
C one section, 3.48 mW/
q
C both sections.
2/ For T
C
> +25
q
C, derate linearly 8.6 mW/
q
C one section, 12.1 mW/
q
C both sections.
1.4 Primary electrical characteristics at T
A
= +25
q
C.
h
FE1
Limit
V
CE
= 5 V dc
I
C
= 10
P
A dc
h
FE2
h
FE3
h
FE4
1/
| h
fe
|
V
CE(sat)
V
BE(sat)
V
CE
= 5 V dc
I
C
= 100
P
A dc
V
CE
= 5 V dc
I
C
= 1 mA dc
V
CE
= 5 V dc
I
C
= 10 mA dc
V
CE
= 10 V dc
I
C
= 50 mA dc
f = 20 MHz
I
C
= 50 mA dc
I
B
= 5 mA dc
I
C
= 50 mA dc
I
B
= 5 mA dc
V dc
Min
25
Max
75
1/ Pulsed (see 4.5.1).0
30
90
40
120
50
150
3
25
0.3
V dc
0.9
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at the end of this document or by letter.
AMSC N/A
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
FSC 5961