The documentation and process conversion measures
necessary to comply with this document shall be
completed by 21 September, 2001.
INCH POUND
MIL-PRF-19500/182F
21 June 2001
SUPERSEDING
MIL-PRF-19500/182E
29 July 1999
PERFORMANCE SPECIFICATION
SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, LOW-POWER
TYPES 2N720A, 2N720AUB, 2N1893, 2N1893S, JAN, JANTX, JANTXV,
JANHC2N720A and JANKC2N720A
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
1. SCOPE
1.1 Scope. This specification covers the detail requirements for NPN silicon, low-power transistors. Three levels
of product assurance are provided for each device type as specified in MIL-PRF-19500. Two levels of product
assurance are provided for die.
1.2 Physical dimensions. See figure 1 (similar to TO-18), figure 2 (similar T0-5), figure 3 (UB package), and
figure 4 (JANHC, JANKC die layout).
1.3 Maximum ratings.
Type
P
T1
(1)
T
C
= +25擄C
W
2N720A
2N720AUB
2N1893
2N1893S
1.8
1.16
3.0
3.0
P
T2
(2)
T
A
= +25擄C
W
0.5
0.5
0.8
0.8
V dc
120
120
120
120
V dc
7
7
7
7
V dc
80
80
80
80
mA dc
500
500
500
500
V dc
100
100
100
100
擄C
-65 to +200
-65 to +200
-65 to +200
-65 to +200
C/W
325
325
175
175
V
CBO
V
EBO
V
CEO
I
C
V
CER
T
J
and T
STG
R
ja
(1) Derate linearly at 10.3 mW/擄C for type 2N720A, 6.63 mW/擄C for type 2N720AUB, and 17.2 mW/擄C for type
2N1893 and 2N1893S for T
C
> +25擄C.
(2) Derate linearly at 3.08 mW/擄C for types 2N720A, 2N720AUB T
A
> +37.5擄C and 5.7 mW/擄C for types
2N1893 and 2N1893S for T
A
> +60擄C.
Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in
improving this document should be addressed to: Defense Supply Center, Columbus ATTN: DSCC-VAC,
P. O. Box 3990, Columbus, OH 43216-5000, by using the Standardization Document Improvement Proposal
(DD Form 1426) appearing at the end of this document or by letter.
AMSC N/A
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
FSC 5961