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ISL6548ACRZA-T Datasheet

  • ISL6548ACRZA-T

  • ACPI Regulator/Controller for Dual Channel DDR Memory System...

  • 491.94KB

  • 16頁

  • INTERSIL   INTERSIL

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ISL6548A
Data Sheet
July 22, 2005
FN9189.1
PRELIMINARY
ACPI Regulator/Controller for
Dual Channel DDR Memory Systems
The ISL6548A provides a complete ACPI compliant power
solution for up to 4 DIMM dual channel DDR/DDR2 Memory
systems. Included are both a synchronous buck controller to
supply V
DDQ
during S0/S1 and S3 states. During S0/S1
state, a fully integrated sink-source regulator generates an
accurate (V
DDQ
/2) high current V
TT
voltage without the
need for a negative supply. A second PWM controller, which
requires external MOSFET drivers, is available for regulation
of the GMCH Core voltage. A sink/source LDO controller is
also integrated for the CPU/GMCH V
TT
termination voltage
regulation. Another LDO is available for the ICH7 voltage.
The switching PWM controller drives two N-Channel
MOSFETs in a synchronous-rectified buck converter
topology. The synchronous buck converter uses voltage-
mode control with fast transient response. The switching
regulator provides a maximum static regulation tolerance of
鹵
2% over line, load, and temperature ranges. The output is
user-adjustable by means of external resistors down to 0.8V.
An integrated soft-start feature brings all outputs into
regulation in a controlled manner when returning to S0/S1
state from any sleep state. During S0 the VIDPGD signal
indicates that the GMCH and CPU V
TT
termination voltage
is within spec and operational.
All outputs, except V
ICH7
, have undervoltage protection. The
switching regulator also has overvoltage and overcurrent
protection. Thermal shutdown is integrated.
Features
鈥?Generates 5 Regulated Voltages
- Synchronous Buck PWM Controller for DDR V
DDQ
- 3A Integrated Sink/Source Linear Regulator with
Accurate V
DDQ
/2 Divider Reference for DDR V
TT
- PWM Regulator for GMCH Core
- Sink/Source LDO Regulator for CPU/GMCH V
TT
Termination
- LDO Regulator for ICH7
鈥?ACPI compliant sleep state control
鈥?Glitch-free Transitions During State Changes
鈥?V
DDQ
PWM Controller Drives Low Cost N-Channel
MOSFETs
鈥?250kHz Constant Frequency Operation
- Both PWM controllers are Phase Shifted 180擄
鈥?Tight Output Voltage Regulation
- All Outputs:
鹵
2% Over Temperature
鈥?Fully-Adjustable Outputs with Wide Voltage Range: Down
to 0.8V supports DDR and DDR2 Specifications
鈥?Simple Single-Loop Voltage-Mode PWM Control Design
鈥?Fast PWM Converter Transient Response
鈥?Under and Overvoltage Monitoring
鈥?OCP on the V
DDQ
Switching Regulator
鈥?Integrated Thermal Shutdown Protection
鈥?Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
鈥?Single and Dual Channel DDR Memory Power Systems in
ACPI compliant PCs
鈥?Graphics cards - GPU and memory supplies
鈥?ASIC power supplies
鈥?Embedded processor and I/O supplies
鈥?DSP supplies
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright 漏 Intersil Americas Inc. 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

ISL6548ACRZA-T 產(chǎn)品屬性

  • 1

  • 集成電路 (IC)

  • PMIC - 電源管理 - 專用

  • -

  • 存儲器，DDR/DDR2 穩(wěn)壓器

  • 7mA

  • -

  • 0°C ~ 70°C

  • 表面貼裝

  • 28-VQFN 裸露焊盤

  • 28-QFN（6x6）

  • Digi-Reel®

  • ISL6548ACRZA-TDKR

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