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IS93C46A-3PI Datasheet

  • IS93C46A-3PI

  • EEPROM

  • 13頁(yè)

  • ETC

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IS93C46A IS93C56A IS93C66A
ISSI
2002
廬
1,024/2,048/4,096-BIT SERIAL ELECTRICALLY
ERASABLE PROM
NOVEMBER
FEATURES
鈥?Industry-standard Microwire Interface
鈥?Non-volatile data storage
鈥?Low voltage operation:
Vcc = 2.5V to 5.5V
鈥?Full TTL compatible inputs and outputs
鈥?Auto increment for efficient data dump
鈥?User Configured Memory Organization
鈥?By 16-bit or by 8-bit
鈥?Hardware and software write protection
鈥?Defaults to write-disabled state at power-up
鈥?Software instructions for write-enable/disable
鈥?Enhanced low voltage CMOS E
2
PROM
technology
鈥?Versatile, easy-to-use Interface
鈥?Self-timed programming cycle
鈥?Automatic erase-before-write
鈥?Programming status indicator
鈥?Word and chip erasable
鈥?Stop SK anytime for power savings
鈥?Durable and reliable
鈥?40-year data retention after 1M write cycles
鈥?1 million write cycles
鈥?Unlimited read cycles
鈥?Schmitt-trigger inputs
鈥?Industrial and Automotive Temperature Grade
DESCRIPTION
The IS93C46A/56A/66A is a low-cost 1kb/2kb/
4kb non-volatile, ISSI
廬
serial EEPROM. It is
fabricated using an enhanced CMOS design and
process. The IS93C46A/56A/66A contain power-
efficient read/write memory, and organziation of
either 128/256/512 bytes of 8 bits or 64/128/256
words of 16 bits. When the ORG pin is
connected to Vcc or left unconnected, x16 is
selected; when it is connected to ground, x8 is
selected. The IS93C46A/56A/66A is fully
backwards compatible with IS93C46/56/66.
An instruction set controls the operation of the
devices, including read, write, and mode-enable
functions. The data out pin (Dout) indicates the
status of the device during the self-timed non-
volatile programming cycle. The self-timed write
cycle includes an automatic erase-before-write
capability. To protect against inadvertent writes,
the WRITE instruction is accepted only while the
chip is in the write-enabled state. Data is written
once per WRITE instruction to the x8 byte or x16
word selected. If Chip Select (CS) is brought
HIGH just after initiation of the write cycle, the
Dout pin would indicate the Ready/Busy status of
the write activity.
FUNCTIONAL BLOCK DIAGRAM
DUMMY
BIT
R/W
AMPS
INSTRUCTION
DECODE,
CONTROL,
AND
CLOCK
GENERATION
ADDRESS
REGISTER
ADDRESS
DECODER
EEPROM
ARRAY
128/256/512x16
64/128/256/x8
DATA
REGISTER
D
IN
INSTRUCTION
REGISTER
D
OUT
CS
SK
WRITE
ENABLE
HIGH VOLTAGE
GENERATOR
Copyright 漏 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. 鈥?www.issi.com 鈥?/div>
1-800-379-4774
Rev. A
11/12/02
1

IS93C46A-3PI 產(chǎn)品屬性

  • ISSI

  • 電可擦除可編程只讀存儲(chǔ)器

  • 1024 bit

  • 128 x 8, 64 x 16

  • 40 yr

  • 1 MHz

  • 3 mA

  • 2.5 V, 5.5 V

  • + 85 C

  • Through Hole

  • DIP-8

  • 5 ms

  • 2-Wire

  • - 40 C

  • Tube

  • 50

  • 5.5 V

  • 2.5 V

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