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IS61C3216-15KI Datasheet

  • IS61C3216-15KI

  • 32K x 16 HIGH-SPEED CMOS STATIC RAM

  • 8頁(yè)

  • ICSI

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IS61C3216
IS61C3216
32K x 16 HIGH-SPEED CMOS STATIC RAM
DESCRIPTION
The
ICSI
IS61C3216 is a high-speed, 512K static RAM
organized as 32,768 words by 16 bits. It is fabricated using
ICSI
's high-performance CMOS technology. This highly reli-
able process coupled with innovative circuit design techniques,
yields fast access times with low power consumption.
When
CE
is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable and
Output Enable inputs,
CE
and
OE.
The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
The IS61C3216 is packaged in the JEDEC standard 44-pin
400mil SOJ and 44-pin 400mil TSOP-2.
FEATURES
鈥?High-speed access time: 10, 12, 15, and 20 ns
鈥?CMOS low power operation
鈥?450 mW (typical) operating
鈥?250 碌W (typical) standby
鈥?TTL compatible interface levels
鈥?Single 5V 鹵 10% power supply
鈥?I/O compatible with 3.3V device
鈥?Fully static operation: no clock or refresh
required
鈥?Three state outputs
鈥?Industrial temperature available
鈥?Available in 44-pin 400mil SOJ package and
44-pin TSOP-2
1
2
3
4
5
6
7
FUNCTIONAL BLOCK DIAGRAM
A0-A14
DECODER
32K x 16
MEMORY ARRAY
8
9
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
10
11
12
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. 漏 Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
SR008-0B
1

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