IS41LV32256
256K x 32 (8-Mbit) EDO DYNAMIC RAM
3.3V, 100/83/66 MHz
FEATURES
鈥?262,144-word by 32-bit organization
鈥?Single +3.3V 鹵 0.3V power supply
鈥?Four
CAS
inputs for Byte Write and Byte Read
control
鈥?Refresh modes:
RAS-Only, CAS-Before-RAS
(CBR),
and Hidden
鈥?512-cycle refresh in 8 ms
鈥?Fast Page Mode with Extended Data Out
鈥?100-pin PQFP, TQFP package
ISSI
SEPTEMBER 2000
廬
DESCRIPTION
The
ISSI
IS41LV32256 is organized in a 262,122 x 32-bit
CMOS Dynamic Random Access Memory. Four
CAS
signals
facilitate execution of Byte Read and Byte Write operations.
A very fast EDO cycle time of 10 ns allows an operating
frequency of 100 MHz and makes the IS41LV32256 an ideal
frame buffer memory for graphics applications.
The IS41LV32256 is compatible with JEDEC standard
SGRAMs. This 8-Mbit EDO memory offers a significantly
lower latency and a faster memory cycle than the SGRAM.
ISSI
's IS41LV32256 3.3V 256K x 32 device is pin/voltage
compatible with all standard SGRAM parts.
The IS41LV32256 is available in a 100-pin PQFP and TQFP
package.
KEY TIMING PARAMETERS
Parameter
Max.
RAS
Access Time (t
RAC
)
Max.
CAS
Access Time (t
CAC
)
Max. Column Address Access Time (t
AA
)
Max.
OE
Access Time (t
OE
)
Min. Read/Write Cycle Time (t
RC
)
Min. EDO Cycle Time (t
PC
)
-28
28
9
15
9
48
12
-30
30
9
16
9
53
12
-35
35
10
18
10
60
15
Unit
ns
ns
ns
ns
ns
ns
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. 漏 Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc.
Rev. A
09/29/00
1