鈩?/div>
EXTREMELY HIGH dv/dt CAPABILITY
VERY LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
TO-220
3
1
2
1
2
3
TO-220FP
DESCRIPTION
This power MOSFET is designed using the compa-
ny鈥檚 consolidated strip layout-based MESH OVER-
LAY鈩?process. This technology matches and
improves the performances compared with standard
parts from various sources.
Isolated TO-220 option simplifies assembly and cuts
risk of accidental short circuit in crowded monitor
PCB鈥檚.
.APPLICATIONS
s
MONITOR DISPLAYS
s
GENERAL PURPOSE SWITCH
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
dv/dt (1)
V
ISO
T
stg
T
j
Parameter
IRF630M
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Insulation Winthstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
9
5.7
36
75
0.6
5
--
鈥?5 to 150
150
(1)I
SD
鈮?A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
(**) Limited only by Maximum Temperature Allowed
Value
IRF630MFP
200
200
鹵 20
9 (**)
5.7 (**)
36
30
0.24
5
2500
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
V
擄C
擄C
(鈥?Pulse width limited by safe operating area
October 2001
1/9
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