IN74LV573
O
CTAL
D-T
YPE
T
RANSPARENT
L
ATCH
(3-S
TATE
)
By pinning IN74LV573 are compatible with IN74HC573A and
IN74HCT573A series. Input voltage levels are compatible with
stadard CMOS levels.
Output voltage levels are compatible with input levels of CMOS,
NMOS and TTL IC
S
Voltage supply range from 1.2 to 5.5 V
LOW input current: 1.0
碌袗;
0.1
碌袗
at
孝
= 25
擄小
Output current 8 m袗
Latch current: not less than150 m袗 at
孝
= 125
擄小
ESD acceptable value: not less than 2000 V as per HBM and
not less than 200 V as per MM
ORDERING INFORMATION
IN74LV573N Plastic DIP
IN74LV573D SOIC
T
A
= -40擄 to 125擄 C
for all packages
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FUNCTION TABLE
Inputs
OE
LE
L
H
L
H
L
L
D
H
L
X
H
X
X
H -HIGH voltage level
L - LOW voltage level
X - don鈥檛 care
Z - High impedance state
Outputs
Q
H
L
no
change
Z
PIN ASSIGNMENT
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
LE
1
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