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IN74LV241DW Datasheet

  • IN74LV241DW

  • OCTAL BUFFER/LINE DRIVE; 3-STATE

  • 5頁

  • INTEGRAL

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TECHNICAL DATA
IN74LV241
OCTAL BUFFER/LINE DRIVE; 3-STATE
The IN74LV241 is a low-voltage Si-gate CMOS device and is pin and
function compatible with IN74HC/HCT241.
The IN74LV241 is an octal non-inverting buffer/line driver with 3-
state outputs. The 3-state outputs are controlled by the output enable
inputs 1OE and 2OE.
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Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 1.2 to 3.6 V
Low Input Current: 1.0
碌A,
0.1
碌脌
at 脪 = 25
擄脩
Output Current: 8 mA at V
CC
= 3.0 V
High Noise Immunity Characteristic of CMOS Devices
N SUFFIX
PLASTIC DIP
20
1
20
1
DW SUFFIX
SO
ORDERING INFORMATION
IN74LV241N
IN74LV241DW
IZ74LV241
Plastic DIP
SOIC
chip
T
A
= -40擄 to 125擄 C for all packages
LOGIC DIAGRAM
1A
0
1A
1
1A
2
1A
3
DATA
INPUTS
2A
0
2A
1
2
18
PIN ASSIGNMENT
1Y
0
1Y
1
1Y
2
1Y
3
2Y
0
2Y
1
2Y
0
2Y
1
NONINVERTING
OUTPUTS
4
6
8
11
13
16
14
12
9
7
5
1OE
1A
0
2Y
3
1A
1
2Y
2
1A
2
2Y
1
1A
3
2Y
0
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
2OE
1Y
0
2A
3
1Y
1
2A
2
1Y
2
2A
1
1Y
3
2A
0
2A
0
15
2A
1
17
3
OUTPUT
ENABLES
1OE
2OE
1
19
FUNCTION TABLE
Input
1OE
L
PIN 20=V
CC
PIN 10 = GND
L
H
1An
L
H
X
Output
1Yn
L
H
Z
Input
2OE
H
H
L
2An
L
H
X
Output
2Yn
L
H
Z
H= high level
L = low level
X = don鈥檛 care
Z = high impedance
INTEGRAL
1

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    AND-Gated J-K Master-Slave Flip- Flops with Reset and Clear
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    AND-Gated J-K Master-Slave Flip-Flops with Reset and Clear
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    INTEGRAL [...
  • 英文版
    Hex Inverter Buffers/Drivers with Open-Collector High-Voltag...
    INTEGRAL
  • 英文版
    Hex Inverter Buffers/Drivers with Open-Collector High-Voltag...
    IKSEMICON ...
  • 英文版
    Hex Inverter Buffers/Drivers with Open-Collector High-Voltag...
    INTEGRAL [...
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