鈥?/div>
鹵14V
Analog Signal Range
鈥?No SCR Latchup
鈥?Break-Before-Make Switching
鈥?Binary Address Control (2 Address Inputs Control 2
Out of 8 Channels)
鈥?TTL and CMOS Compatible Address Control
鈥?Pin Compatible with DG509A, HI-509 and ADG509A
鈥?Internal Diode in Series with V+ for Fault Protection
Description
The IH6208 is a CMOS 2 of 8 multiplexer. The part is a
plug-in replacement for the DG509A. Two-line binary
decoding is used so that the 8 channels can be controlled in
pairs by the binary inputs; additionally a third input is
provided for use as a system enable. When the ENABLE
input is high (5V), the channels are sequenced by the 2 line
binary inputs, and when low (0V) all channels are off. The 2
Address inputs arecontrolled by TTL logic or CMOS logic
elements with a 鈥?鈥?corresponding to any voltage less than
0.8V and a 鈥?鈥?corresponding to any voltage greater than
2.4V. Note that the ENABLE input must be taken to 5V to
enable the system, and less than 0.8V to disable the system.
Part Number Information
PART
NUMBER
IH6208MJE
IH6208MJE/883B
IH6208MFE/883B
IH6208CJE
IH6208CPE
TEMP.
RANGE (
o
C)
-55 to 125
-55 to 125
-55 to 125
0 to 70
0 to 70
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld Flat Pack
16 Ld CERDIP
16 Ld PDIP
PKG.
NO.
F16.3
F16.3
K16.A
F16.3
E16.3
Pinout
IH6208
(CERDIP, PDIP)
TOP VIEW
A
0
1
EN 2
V- 3
S
1a
4
S
2a
5
S3a 6
S
4a
7
D
a
8
16 A
1
15 GND
14 V+
13 S
1b
12 S
2b
11 S
3b
10 S
4b
9 D
b
Functional Diagram
S
1a
S
2a
S
3a
S
4a
S
1b
S
2b
S
3b
S
4b
A
0
A
1
EN
2 LINE BINARY ADDRESS INPUTS
(0 0) AND EN = 5V (EN = 鈥?鈥?for +5V, 鈥?鈥?for 0V)
ABOVE EXAMPLE SHOWS
CHANNELS 1a AND 1b ON.
D
a
Db
ADDRESS DECODER
1 OF 4
ENABLE
INPUT
TRUTH TABLE
A
1
x
0
0
1
1
A
0
x
0
1
0
1
EN
0
1
1
1
1
ON SWITCH PAIR
None
1a, 1b
2a, 2b
3a, 3b
4a, 4b
NOTE: A
0
, A
1
Logic 鈥?鈥?= V
AH
鈮?/div>
2.4V, V
ENH
鈮?/div>
4.5V
Logic 鈥?鈥?= V
AL
鈮?/div>
0.8V.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
Harris Corporation 1997
File Number
3157.2
12-129
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