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IDTCV115C Datasheet

  • IDTCV115C

  • PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR

  • 86.58KB

  • 19頁

  • IDT

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IDTCV115C
PROGRAMMABLE FLEXPC鈩?CLOCK FOR P4 PROCESSOR
COMMERCIAL TEMPERATURE RANGE
PROGRAMMABLE FLEXPC鈩?/div>
CLOCK FOR P4 PROCESSOR
IDTCV115C
FEATURES:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
DESCRIPTION:
One high precision N and SSC programmable PLL for SRC/PCI
One high precision N and SSC programmable PLL for CPU
One high precision SSC programmable PLL for SATA
One high precision PLL for 96MHz/48MHz
Band-gap circuit for differential outputs
Support multiple spread spectrum modulation, down and
center
鈥?Support SMBus block read/write, index read/write
鈥?Selectable output strength for REF, PCI, and USB48MHz
鈥?Available in SSOP package
IDTCV115C is a 56 pin clock device, complying the latest Intel CK410
requirements, for Intel advance P4 processors. The CPU output buffer is
designed to support up to 400MHz processor. One dedicated PLL for Serial
ATA clock provides high accuracy frequency. This device also implements
Band-gap referenced I
REF
to reduce the impact of V
DD
variation on differential
outputs, which can provide more robust system performance.
Each CPU/SRC/PCI, SATA clock has its own Spread Spectrum selection,
which allows for isolated changes instead of affecting other clock groups.
KEY SPECIFICATION:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
CPU/SRC CLK cycle to cycle jitter < 85ps
SATA CLK cycle to cycle jitter < 85ps
Static PLL frequency divide error < 114 ppm
Static PLL frequency divide error for 48MHz < 5 ppm
FUNCTIONAL BLOCK DIAGRAM
SATA PLL
SCC
Programmable
SATA/
SRC4 - SATA
PCI[4:0], PCIF[2:0]
PCI/
14.318MHz
Osc
PCIEX PLL
SCC
N Programmable
PCIE/
SRC[6:5] [3:1]
MUX
CPU PLL
SCC
N Programmable
CPU_ITP/
SRC7
Host/
CPU[1:0]
48MHz/
USB48
Fixed PLL
No SCC
96MHz/
DOT96
OUTPUT TABLE
CPU
2
CPU_ITP/SRC
1
SRC
5
SATA
1
PCI/PCIF
8
REF
1
DOT96
1
48MHz
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
1
漏 2004 Integrated Device Technology, Inc.
MAY 2004
DSC - 6520/10

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