鈥?/div>
Ethernet/fast ethernet
Router
Network switches
SAN
Instrumentation
The IDT5V925 is a high-performance, low skew, low jitter phase-locked
loop (PLL) clock driver. It provides precise phase and frequency alignment
of its clock outputs to an externally applied clock input or internal crystal
oscillator. The IDT5V925 has been specially designed to interface with
Gigabit Ethernet and Fast Ethernet applications by providing a 125MHz
clock from 25MHz input. It can also be programmed to provide output
frequencies ranging from 3.125MHz to 160MHz with input frequencies
ranging from 3.125MHz to 80MHz.
The IDT5V925 includes an internal RC filter that provides excellent jitter
characteristics and eliminates the need for external components. When
using the optional crystal input, the chip accepts a 10-30MHz fundamental
mode crystal with a maximum equivalent series resistance of 50鈩? The on-
chip crystal oscillator includes the feedback resistor and crystal capacitors
(nominal load capacitance is 15pF).
FUNCTIONAL BLOCK DIAGRAM
S
0
S
1
SE LEC T
M OD E
FB
C LKIN
PH ASE
DETEC TO R
LOO P
FILTER
VC O
0
1
VC O
DIVIDE
1/N
Q /N
X
2
X
1
OPTION AL
C RYSTAL
XTAL
OSC
Q
0
Q
1
Q
2
OE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
c
2004 Integrated Device Technology, Inc.
SEPTEMBER 2002
DSC-5943/2