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IDT54FCT841ATEB Datasheet

  • IDT54FCT841ATEB

  • FAST CMOS BUS INTERFACE LATCHES

  • 7頁

  • IDT

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FAST CMOS
BUS INTERFACE
LATCHES
Integrated Device Technology, Inc.
IDT54/74FCT841AT/BT/CT/DT
FEATURES:
鈥?Common features:
鈥?Low input and output leakage
鈮?碌A(chǔ)
(max.)
鈥?CMOS power levels
鈥?True TTL input and output compatibility
鈥?V
OH
= 3.3V (typ.)
鈥?V
OL
= 0.3V (typ.)
鈥?Meets or exceeds JEDEC standard 18 specifications
鈥?Product available in Radiation Tolerant and Radiation
Enhanced versions
鈥?Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
鈥?Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
鈥?Features for FCT841T:
鈥?A, B, C and D speed grades
鈥?High drive outputs (-15mA I
OH
, 48mA I
OL
)
鈥?Power off disable outputs permit 鈥渓ive insertion鈥?/div>
DESCRIPTION:
The FCT8xxT series is built using an advanced dual metal
CMOS technology.
The FCT8xxT bus interface latches are designed to elimi-
nate the extra packages required to buffer existing latches
and provide extra data width for wider address/data paths or
buses carrying parity. The FCT841T are buffered, 10-bit wide
versions of the popular FCT373T function. They are ideal for
use as an output port requiring high I
OL
/I
OH
.
All of the FCT8xxT high-performance interface family can
drive large capacitive loads, while providing low-capacitance
bus loading at both inputs and outputs. All inputs have clamp
diodes to ground and all outputs are designed for low-capaci-
tance bus loading in high-impedance state.
FUNCTIONAL BLOCK DIAGRAM
D
0
D
1
D
2
D
3
D
4
D
5
D
8
D
9
D
LE Q
D
LE Q
D
LE Q
D
LE Q
D
LE Q
D
LE Q
D
LE Q
D
LE Q
LE
OE
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
8
Y
9
2571 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1996
Integrated Device Technology, Inc.
JUNE 1996
2571/6
6.22
1

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