鈥?/div>
Std., A, B and C speed grades
Low input and output leakage
鈮?碌A
(max.)
CMOS power levels
True TTL input and output compatibility
鈥?V
OH
= 3.3V (typ.)
鈥?V
OL
= 0.3V (typ.)
High drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, SSOP, QSOP, CERPACK and
LCC packages
DESCRIPTION:
The IDT54/74FCT521T/AT/BT/CT are 8-bit identity com-
parators built using an advanced dual metal CMOS technol-
ogy. These devices compare two words of up to eight bits each
and provide a LOW output when the two words match bit for
bit. The expansion input
I
A
=
B
also serves as an active LOW
enable input.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
I
A=B
1
2
3
4
5
6
7
8
9
10
20
19
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
E20-1
18
17
16
15
14
13
12
11
V
CC
O
A=B
B
7
A
7
B
6
A
6
B
5
A
5
B
4
A
4
2572 drw 02
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
A
4
B
4
A
5
B
5
A
6
B
6
A
7
B
7
I
A=B
2572 drw 01
A
0
B
0
A
1
B
1
A
2
B
2
A
3
B
3
GND
O
A=B
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
3 2
A
1
B
1
A
2
B
2
A
3
4
5
6
7
8
I
A=B
V
CC
B
0
A
0
INDEX
1
20 19
18
17
16
15
14
O
A=B
B
7
A
7
B
6
A
6
B
5
L20-2
9 10 11 12 13
B
3
GND
A
4
B
4
A
5
2572 drw 03
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1995
Integrated Device Technology, Inc.
APRIL 1995
DSC-4210/4
6.16
1
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