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IDT54FCT534CEB Datasheet

  • IDT54FCT534CEB

  • FAST CMOS OCTAL D REGISTERS (3-STATE)

  • 8頁

  • IDT

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FAST CMOS OCTAL D
REGISTERS (3-STATE)
IDT54/74FCT374/A/C
IDT54/74FCT534/A/C
IDT54/74FCT574/A/C
Integrated Device Technology, Inc.
FEATURES:
鈥?IDT54/74FCT374/534/574 equivalent to FAST鈩?speed
and drive
鈥?IDT54/74FCT374A/534A/574A up to 30% faster than
FAST
鈥?IDT54/74FCT374C/534C/574C up to 50% faster than
FAST
鈥?I
OL
= 48mA (commercial) and 32mA (military)
鈥?CMOS power levels (1mW typ. static)
鈥?Edge triggered master/slave, D-type flip-flops
鈥?Buffered common clock and buffered common three-
state control
鈥?Product available in Radiation Tolerant and Radiation
Enhanced versions
鈥?Military product compliant to MIL-STD-883, Class B
鈥?Meets or exceeds JEDEC Standard 18 specifications
DESCRIPTION:
The IDT54/74FCT374/A/C, IDT54/74FCT534/A/C and
IDT54/74FCT574/A/C are 8-bit registers built using an ad-
vanced dual metal CMOS technology. These registers consist
of eight D-type flip-flops with a buffered common clock and
buffered 3-state output control. When the output enable (
OE
)
is LOW, the eight outputs are enabled. When the
OE
input is
HIGH, the outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements
of the D inputs is transferred to the O outputs on the LOW-to-
HIGH transition of the clock input.
The IDT54/74FCT374/A/C and IDT54/74FCT574/A/ C have
non-inverting outputs with respect to the data at the D inputs.
The IDT54/74FCT534/A/C have inverting outputs.
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT374 AND IDT54/74FCT574
D
0
CP
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
D
1
D
2
D
3
D
4
D
5
D
6
D
7
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
2603 cnv* 01
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT534
D
0
CP
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
CP D
Q
D
1
D
2
D
3
D
4
D
5
D
6
D
7
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
2603 cnv* 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1992
Integrated Device Technology, Inc.
MAY 1992
DSC-4622/2
7.13
1

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