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IDT54FCT3574APYB Datasheet

  • IDT54FCT3574APYB

  • 3.3V CMOS OCTAL D REGISTERS (3-STATE)

  • 7頁

  • IDT

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3.3V CMOS OCTAL D
REGISTERS (3-STATE)
Integrated Device Technology, Inc.
IDT54/74FCT3574/A
ADVANCE INFORMATION
FEATURES:
鈥?0.5 MICRON CMOS Technology
鈥?ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
鈥?25 mil Center SSOP Packages
鈥?Extended commercial range of -40擄C to +85擄C
鈥?V
CC
= 3.3V
鹵0.3V,
Normal Range or
V
CC
= 2.7V to 3.6V, Extended Range
鈥?CMOS power levels (0.4碌W typ. static)
鈥?Rail-to-Rail output swing for increased noise margin
鈥?Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The FCT3574/A are 8-bit registers built using an advanced
dual metal CMOS technology. These registers consist of
eight D-type flip-flops with a buffered common clock and
buffered 3-state output control. When the output (
OE
) input is
LOW, the eight outputs are enabled. When the
OE
input is
HIGH, the outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements
of the D inputs is transferred to the O outputs on the LOW-to-
HIGH transition of the clock input.
FUNCTIONAL BLOCK DIAGRAM
D
0
CP
CP D
Q
CP D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
D
1
D
2
D
3
D
4
D
5
D
6
D
7
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
3095 drw 01
PIN CONFIGURATION
OE
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
1
2
3
4
P20-1
5 D20-1
SO20-2
6
&
7 SO20-7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
CP
PIN DESCRIPTION
Pin Names
D
N
CP
O
N
Description
D flip-flop data inputs
Clock Pulse for the register. Enters data on
LOW-to-HIGH transition.
3-state outputs, (true)
3-state outputs, (inverted)
Active LOW 3-state Output Enable input
3095 tbl 01
O
N
OE
DIP/SOIC/SSOP
TOP VIEW
3095 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1995
Integrated Device Technology, Inc.
AUGUST 1995
DSC-4650/-
8.14
1

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