Power off disable outputs permit 鈥渓ive insertion鈥?/div>
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, QSOP, CERPACK and LCC
packages
DESCRIPTION:
The IDT54/74FCT299T/AT/CT are built using an advanced
dual metal CMOS technology. The IDT54/74FCT299T/AT/
CT are 8-input universal shift/storage registers with 3-state
outputs. Four modes of operation are possible: hold (store),
shift left, shift right and load data. The parallel load inputs and
flip-flop outputs are multiplexed to reduce the total number of
package pins. Additional outputs are provided for flip-flops Q
0
and Q
7
to allow easy serial cascading. A separate active LOW
Master Reset is used to reset the register.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
FUNCTIONAL BLOCK DIAGRAM
S
1
S
0
DS
7
DS
0
CP
C
D
Q
0
MR
OE
1
OE
2
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
2632 drw 01
D
Q
C
P
C
D
D
Q
C
P
C
D
D
Q
C
P
C
D
D
Q
C
P
C
D
D
Q
C
P
C
D
D
Q
C
P
C
D
D
Q
C
P
C
D
D
Q
C
P
Q
7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1995
Integrated Device Technology, Inc.
APRIL 1995
DSC-4205/4
6.11
1
IDT54FCT299TQ相關(guān)型號PDF文件下載
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型號
版本
描述
廠商
下載
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英文版
PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
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PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
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PROGRAMMABLE CLOCK GENERATOR
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PROGRAMMABLE CLOCK GENERATOR
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1
2
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5
6
7
