鈥?Power off disable outputs permit 鈥渓ive insertion鈥?/div>
鈥?Typical V
OLP
(Output Ground Bounce) < 1.0V at
V
CC
= 5V, T
A
= 25擄C
鈥?Features for FCT162827AT/BT/CT/ET:
鈥?Balanced Output Drivers:
鹵24mA
(commercial),
鹵16mA
(military)
鈥?Reduced system switching noise
鈥?Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V,T
A
= 25擄C
DESCRIPTION:
The FCT16827AT/BT/CT/ET and FCT162827AT/BT/CT/
ET 20-bit buffers are built using advanced dual metal CMOS
technology. These 20-bit bus drivers provide high-perfor-
mance bus interface buffering for wide data/address paths or
busses carrying parity. Two pair of NAND-ed output enable
controls offer maximum control flexibility and are organized to
operate the device as two 10-bit buffers or one 20-bit buffer.
Flow-through organization of signal pins simplifies layout. All
inputs are designed with hysteresis for improved noise mar-
gin.
The FCT16827AT/BT/CT/ET are ideally suited for driving
high capacitance loads and low impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162827AT/BT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times鈥搑educing
the need for external series terminating resistors. The
FCT162827AT/BT/CT/ET are plug-in replacements for the
FCT16827AT/BT/CT/ET and ABT16827 for on-board inter-
face applications.
FUNCTIONAL BLOCK DIAGRAM
1
OE
1
1
OE
2
2
OE
1
2
OE
2
1
A
1
1
Y
1
2
A
1
2
Y
1
TO 9 OTHER CHANNELS
2773 drw 01
TO 9 OTHER CHANNELS
2773 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1996
Integrated Device Technology, Inc.
AUGUST 1996
DSC-2773/7
5.17
1